IP Library Granted Patent US 12,027,419
Granted Patent B2
US 12,027,419 · App. 16/912,284 · Granted Jul 2, 2024

Semiconductor device including liner structure

Inventors: Ching-Fu Yeh (Hsinchu, TW); Yu-Chen Chan (Taichung, TW); Guanyu Luo (Hsinchu, TW); Meng-Pei Lu (Hsinchu, TW); Chao-Hsien Peng (Zhubei, TW); Shin-Yi Yang (New Taipei, TW); Ming-Han Lee (Taipei, TW); Andy Li (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company Limited
H01L21/76846H01L21/76802H01L21/76862H01L21/76877H01L23/5226H01L23/53238
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Quick Facts
Patent No.
US 12,027,419
App. No.
16/912,284
Granted
Jul 2, 2024
Kind
B2
Abstract

A semiconductor device includes an interconnect structure embedded in a first metallization layer comprising a dielectric material. The interconnect structure includes a first metal material. The semiconductor device includes a first liner structure embedded in the first metallization layer. The first liner structure is extended along one or more boundaries of the interconnect structure in the first metallization layer. The first liner structure includes a second metal material reacted with one or more dopants, the second metal material being different from the first metal material.

Claims (38)

1. A semiconductor device, comprising:

an interconnect structure embedded in a first metallization layer, the first metallization layer comprising an inter-metal dielectric material, and the interconnect structure comprising a first metal material; and

a first liner structure embedded in the first metallization layer,

wherein the first liner structure comprises a second layer over a first layer, the second layer in its entirety being in direct contact with each boundary of the interconnect structure disposed within the first metallization layer, and the first layer having a different composition from the second layer,

wherein a topmost portion of a sidewall of the first layer is in direct contact with at least a portion of the inter-metal dielectric material, and

wherein the second layer of the first liner structure comprises a carbide-based metal structure comprising a second metal material, the second metal material being different from the first metal material and comprising cobalt (Co).

2. The semiconductor device of claim 1 , wherein the second metal material further comprises at least one material selected from the group consisting of: ruthenium (Ru), tantalum (Ta), titanium (Ti), tungsten (W), molybdenum (Mo), zinc (Zn), aluminum (Al), and manganese (Mn).

3. The semiconductor device of claim 1 , wherein the carbide-based metal structure comprises at least one material selected from the group consisting of: CoC x , CoC, Co 2 C, and Co 3 C.

4. The semiconductor device of claim 3 , further comprising:

a second liner structure embedded in a second metallization layer over the first metallization layer, wherein the second liner structure comprises the second metal material reacted with the carbon in the carbide-based metal structure.

5. The semiconductor device of claim 4 , wherein the interconnect structure is wrapped by the first and second liner structures.

6. The semiconductor device of claim 4 , wherein the interconnect structure has a portion in direct contact with the second liner structure.

7. The semiconductor device of claim 1 , wherein the first metal material includes copper (Cu).

8. The semiconductor device of claim 1 , wherein the second metal material is reacted with carbon through a plasma process.

9. The semiconductor device of claim 8 , wherein the plasma process includes at least one plasma process selected from the group consisting of: a hydrogen plasma process, a nitrogen plasma process, an ammonia plasma process, and a methanol plasma process.

10. The semiconductor device of claim 1 , wherein the first layer of the first liner structure comprises at least one material selected from the group consisting of: tantalum nitride (TaN), tantalum nitride silicon (TaNSi), titanium tungsten (TiW), and titanium nitride silicon (TiNSi).

11. A semiconductor device, comprising:

a first metallization layer comprising an interconnect structure disposed in an inter-metal dielectric layer, the interconnect structure comprising a first metal; and

a first liner structure disposed in the first metallization layer, the first liner structure comprising a first layer and a second layer disposed over the first layer,

wherein the first layer and the second layer have different compositions,

wherein an entirety of the second layer is in direct contact with each boundary of the interconnect structure,

wherein at least a topmost portion of a sidewall of the first layer is in direct contact with the inter-metal dielectric layer, and

wherein the second layer comprises a first metal carbide having a second metal that is different from the first metal, the second metal comprising cobalt (Co).

12. The semiconductor device of claim 11 , wherein the second metal further comprises at least one material selected from the group consisting of: ruthenium (Ru), tantalum (Ta), titanium (Ti), tungsten (W), molybdenum (Mo), zinc (Zn), aluminum (Al), and manganese (Mn).

13. The semiconductor device of claim 11 , wherein the first metal carbide comprises at least one material selected from the group consisting of: CoC x , CoC, Co 2 C, and Co 3 C.

14. The semiconductor device of claim 11 , wherein the first layer comprises at least one material selected from the group consisting of: tantalum nitride (TaN), tantalum nitride silicon (TaNSi), titanium tungsten (TiW), and titanium nitride silicon (TiNSi).

15. The semiconductor device of claim 11 , further comprising a second metallization layer disposed over the first metallization layer, the second metallization layer comprising a second liner structure, wherein the second liner structure comprises a second metal carbide having the second metal.

16. The semiconductor device of claim 15 , wherein the interconnect structure is surrounded by the first and second liner structures.

17. A semiconductor device, comprising:

a first metallization layer comprising an interconnect structure disposed in an inter-metal dielectric layer, the interconnect structure comprising a first metal; and

a first liner structure disposed in the first metallization layer and extending between the interconnect structure and the inter-metal dielectric layer,

wherein the first liner structure comprises a first layer and a second layer disposed over the first layer, the first layer and the second layer having different compositions,

wherein an entirety of the second layer is in direct contact with each surface of the interconnect structure,

wherein a topmost portion of a sidewall of the first layer is in direct contact with the inter-metal dielectric layer, and

wherein the second layer comprises a metal carbide material having a second metal that is different from the first metal, the second metal comprising cobalt (Co).

18. The semiconductor device of claim 17 , wherein the metal carbide material comprises at least one material selected from the group consisting of: CoC x , CoC, Co 2 C, and Co 3 C.

19. The semiconductor device of claim 17 , wherein the second metal further comprises at least one material selected from the group consisting of: ruthenium (Ru), tantalum (Ta), titanium (Ti), tungsten (W), molybdenum (Mo), zinc (Zn), aluminum (Al), and manganese (Mn).

20. The semiconductor device of claim 17 , wherein the first layer comprises at least one material selected from the group consisting of: tantalum nitride (TaN), tantalum nitride silicon (TaNSi), titanium tungsten (TiW), and titanium nitride silicon (TiNSi).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2020
From: YEH, CHING-FU; CHAN, YU-CHEN; LUO, GUANYU; LU, MENG-PEI; PENG, CHAO-HSIEN; YANG, SHIN-YI; LEE, MING-HAN; LI, ANDY
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 053042/0859 →
Continuity (1)
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