IP Library › Granted Patent US 12,034,736
Granted Patent B2
US 12,034,736 · App. 17/484,330 · Granted Jul 9, 2024

Detecting clock synchronization attacks with pseudo-randomization of frames in the protected window

Inventors: Marcio Juliato (Portland, OR); Javier Perez-Ramirez (North Plains, OR); Mikhail Galeev (Beaverton, OR); Christopher Gutierrez (Hillsboro, OR); Dave Cavalcanti (Portland, OR); Manoj Sastry (Portland, OR); Vuk Lesi (Cornelius, OR)
Assignee: INTEL CORPORATION
H04L63/105H04L9/0656H04L63/1483H04L69/22H04L69/28
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,034,736
App. No.
17/484,330
Granted
Jul 9, 2024
Kind
B2
Abstract

Systems and methods to detect attacks on the clocks of devices in time sensitive networks are described. Particularly, the disclosed systems and methods provide detection and mitigation of timing synchronization attacks based on pseudo-random numbers generated and used to select and authenticate timing of transmission of messages in protected transmission windows.

Claims (37)

1. A computing-implemented method, comprising:

generating a pseudo-random number (PRN); and

transmitting a message during a protected transmission window of a data stream based on the PRN and a time buffer (TB), a plurality of switching nodes communicating via the data stream, wherein a one of the plurality of switching nodes can independently generate the PRN.

2. The computing-implemented method of claim 1 , transmitting the message during the protected transmission window of the data stream based on the PRN comprising:

identifying a delay time (DT) of a plurality of DTs based on the PRN; and

initiating, at the DT of the plurality of DTs, transmission of the message during the protected transmission window.

3. The computing-implemented method of claim 1 , transmitting the message during the protected transmission window of the data stream based on the PRN comprising:

identifying the TB of a plurality of TBs based on the PRN; and

transmitting the message during the protected transmission window such that the message transmission ends at the TB of the plurality of TBs.

4. The computing-implemented method of claim 3 , transmitting the message during the protected transmission window such that the message transmission ends at the TB of the plurality of TBs comprising inserting extra bits into the message.

5. The computing-implemented method of claim 4 , wherein the extra bits are a random sequence of bits based on the PRN.

6. The computing-implemented method of claim 1 , wherein the data stream is established in accordance with the Institute of Electrical and Electronics Engineers (IEEE) 802.1AS and/or 802.1Qbv standards.

7. A computing apparatus comprising: a processor; and

a memory storing instructions that, when executed by the processor, configure the apparatus to:

generate a pseudo-random number (PRN); and

transmit a message during a protected transmission window of a data stream based on the PRN and a time buffer (TB), a plurality of switching nodes communicating via the data stream, wherein a one of the plurality of switching nodes can independently generate the PRN.

8. The computing apparatus of claim 7 , the instructions when executed by the processor configure the apparatus to:

identify a delay time (DT) of a plurality of DTs based on the PRN; and

initiate, at the DT of the plurality of DTs, transmission of the message during the protected window.

9. The computing apparatus of claim 7 , the instructions when executed by the processor configure the apparatus to:

identify the TB of a plurality of TBs based on the PRN; and

transmit the message during the protected transmission window such that the message transmission ends at the TB of the plurality of TBs.

10. The computing apparatus of claim 9 , the instructions when executed by the processor configure the apparatus to insert extra bits into the message.

11. The computing apparatus of claim 10 , wherein the extra bits are a random sequence of bits based on the PRN.

12. The computing apparatus of claim 7 , wherein the data stream is established in accordance with the Institute of Electrical and Electronics Engineers (IEEE) 802.1AS and/or 802.1Qbv standards.

13. A non-transitory computer-readable storage medium, the computer-readable storage medium including instructions that when executed by circuitry of a computer, cause the computer to:

generate a pseudo-random number (PRN); and

transmit a message during a protected transmission window of a data stream based on the PRN and a time buffer (TB), a plurality of switching nodes communicating via the data stream, wherein a one of the plurality of switching nodes can independently generate the PRN.

14. The non-transitory computer-readable storage medium of claim 13 , the instructions when executed by the circuitry of the computer cause the computer to:

identify a delay time (DT) of a plurality of DTs based on the PRN; and

initiate, at the DT of the plurality of DTs, transmission of the message during the protected transmission window.

15. The non-transitory computer-readable storage medium of claim 13 , the instructions when executed by the circuitry of the computer cause the computer to:

identify the TB of a plurality of TBs based on the PRN; and

transmit the message during the protected transmission window such that the message transmission ends at the TB of the plurality of TBs.

16. The non-transitory computer-readable storage medium of claim 13 , the instructions when executed by the circuitry of the computer cause the computer to insert extra bits into the message.

17. The non-transitory computer-readable storage medium of claim 16 , wherein the extra bits are a random sequence of bits based on the PRN.

18. The non-transitory computer-readable storage medium of claim 13 , wherein the data stream is established in accordance with the Institute of Electrical and Electronics Engineers (IEEE) 802.1AS and/or 802.1Qbv standards.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2022
From: JULIATO, MARCIO; PEREZ-RAMIREZ, JAVIER; GALEEV, MIKHAIL; GUTIERREZ, CHRISTOPHER; CAVALCANTI, DAVE; SASTRY, MANOJ; LESI, VUK
To: INTEL CORPORATION
Reel/Frame 060426/0019 →
Continuity (1)
Related Publication 20220014529A1 · Jan 13, 2022
Cited By (1)
US 12,506,742