Method of forming a nano-FET semiconductor device
Embodiments include nanostructure devices and methods of forming nanostructure devices which include a treatment process to expand a sidewall spacer material to close a seam in the sidewall spacer material after deposition. The treatment process includes oxidation anneal and heat anneal to expand the sidewall spacer material and crosslink the open seam to form a closed seam, lower k-value, and decrease density.
1. A method comprising:
etching a first recess adjacent a first nanostructure and a second nanostructure, the first nanostructure over the second nanostructure;
etching, through the first recess, sidewalls of the first nanostructure to form a sidewall recess of the first nanostructure;
forming a first sidewall spacer in the sidewall recess, the first sidewall spacer having a horizontal seam between an upper portion and a lower portion;
performing an oxidation anneal, the oxidation anneal infusing the horizontal seam with oxygen; and
performing a dry anneal, the dry anneal causing crosslinking between the upper portion and the lower portion, a size of the horizontal seam reduced by the crosslinking.
2. The method of claim 1 , wherein a k-value of the first sidewall spacer is reduced by 5% to 10% after the oxidation anneal and the dry anneal.
3. The method of claim 1 , wherein the oxidation anneal and the dry anneal increase a volume of the first sidewall spacer by 5% to 20%.
4. The method of claim 1 , further comprising:
depositing a source/drain region in the first recess;
etching an opening over the first nanostructure and the second nanostructure;
etching to extend the opening to remove the first nanostructure; and
depositing a gate structure in the opening and around the second nanostructure, the first sidewall spacer disposed between the gate structure and the source/drain region.
5. The method of claim 1 , wherein the oxidation anneal is performed at a temperature between 200° C. and 600° C. in an ambient environment that includes H 2 O, CO 2 , O 2 , O 3 , O related oxidant species, or combinations thereof.
6. The method of claim 1 , wherein the dry anneal is performed at a temperature between 500° C. and 800° C.
7. The method of claim 1 , wherein the oxidation anneal and the dry anneal decrease a density of the first sidewall spacer by 5% to 15%.
8. A method comprising:
forming alternating layers of a first material layer and a second material layer;
etching a first recess and a second recess in the alternating layers of the first material layer and the second material layer to form a stack of nanostructures, the stack of nanostructures including a first nanostructure between a second nanostructure and a third nanostructure;
recessing a sidewall of a first nanostructure to form a sidewall recess;
forming a first inner sidewall spacer in the sidewall recess, the first inner sidewall spacer having a horizontal seam between an upper portion and a lower portion of the first inner sidewall spacer in the sidewall recess;
treating the first inner sidewall spacer to reduce the horizontal seam between the upper portion and the lower portion of the first inner sidewall spacer; and
replacing the first nanostructure with a gate structure.
9. The method of claim 8 , wherein the treating comprises performing an oxidation anneal, the oxidation anneal infusing the horizontal seam with oxygen.
10. The method of claim 9 , wherein the treating comprises performing a dry anneal.
11. The method of claim 8 , wherein the treating comprises forming an oxidation on a first side of the first inner sidewall spacer.
12. The method of claim 11 , wherein the oxidation has a lateral depth between 0 nm and 8 nm.
13. The method of claim 11 , wherein the oxidation has a gradient of concentration which decreases laterally deeper into the first inner sidewall spacer from the first side of the first inner sidewall spacer.
14. The method of claim 11 , wherein a material composition of the first inner sidewall spacer comprises Cat 0-10%, N at 0-20%, O at 30-60%, and Si at 25-40%, by molecular weight.
15. The method of claim 11 , wherein a material composition of the first inner sidewall spacer immediately adjacent the gate structure comprises C at 5-15%, N at 10-30%, O at 10-55%, and Si at 30-45%, by molecular weight.
16. A method comprising:
forming a stack of layers, the stack of layers comprising alternating layers of a first material and a second material;
etching a first recess in the stack of layers, the etching exposing a sidewall of a first nanostructure layer of the stack of layers;
recessing the sidewall of a first nanostructure layer to form a sidewall recess;
forming a first inner sidewall spacer in the sidewall recess, the first inner sidewall spacer having a horizontal seam between an upper portion and a lower portion of the first inner sidewall spacer in the sidewall recess, wherein an outer sidewall of the first inner sidewall spacer having a second recess;
performing an oxidation anneal;
after performing the oxidation anneal, performing a dry anneal, wherein after performing the dry anneal, a volume of the first inner sidewall spacer increases and a size of the second recess is reduced;
forming a source/drain region in the first recess and the second recess; and
replacing the first nanostructure layer with a gate structure.
17. The method of claim 16 , wherein the oxidation anneal is performed at a temperature between 200° C. and 600° C. in an ambient environment that includes H 2 O, CO 2 , O 2 , O 3 , O related oxidant species, or a combination thereof.
18. The method of claim 16 , wherein the dry anneal is performed at a temperature between 500° C. and 800° C.
19. The method of claim 16 , wherein the oxidation anneal and the dry anneal decrease a density of the first inner sidewall spacer by 5% to 15%.
20. The method of claim 16 , wherein after performing the dry anneal, the second recess has a depth between 0 nm and 5 nm.