IP Library › Granted Patent US 12,040,714
Granted Patent B2
US 12,040,714 · App. 18/130,006 · Granted Jul 16, 2024

Switching regulator and operating method

Inventors: Hyosang Youn (Hwaseong-si, KR); Minwoo Kim (Seoul, KR); Hyungju Park (Hwaseong-si, KR); Deokgi Lee (Seoul, KR); Changseok Chae (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H02M3/1582H02M3/18
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Quick Facts
Patent No.
US 12,040,714
App. No.
18/130,006
Granted
Jul 16, 2024
Kind
B2
Abstract

A switching regulator generates an output voltage from an input voltage and includes; a charge sharing circuit that selectively forms one of a first charge sharing path between a first flying capacitor and a second bootstrap capacitor and a second charge sharing path between a second flying capacitor and a first bootstrap capacitor based on first and second conversion modes.

Claims (61)

1. A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising:

a first switching circuit including a first transistor that is connected to a first node receiving the input voltage in response to a first switching control signal in a boost mode;

a second switching circuit including a second transistor that is connected to a second node outputting the output voltage in response to a second switching control signal in a buck mode; and

a charge sharing circuit configured to form a second charge sharing path for boosting the first switching control signal in the boost mode and a first charge sharing path for boosting the second switching control signal in the buck mode.

2. The switching regulator of claim 1 , wherein the first transistor is configured to selectively connect the first node in response to the first switching control signal, in the buck mode, and

the second transistor is configured to selectively connect the second node in response to the second switching control signal, in the boost mode.

3. The switching regulator of claim 1 , wherein the first and second transistor comprise an n-channel metal oxide semiconductor (nMOS) transistor.

4. The switching regulator of claim 1 , wherein the first switching circuit further comprises a first bootstrap capacitor that is charged through the second charge sharing path to boost the first switching control signal, and

the second switching circuit further comprises a second bootstrap capacitor that is charged by through the first charge sharing path to boost the second switching control signal.

5. The switching regulator of claim 1 , wherein the first switching circuit further comprises a first flying capacitor that is discharged through the first charge sharing path, and

the second switching circuit comprises a second flying capacitor that is discharged through the second charge sharing path.

6. The switching regulator of claim 1 , wherein the first switching circuit further comprises a first flying capacitor,

in a first section of the buck mode, the first flying capacitor is connected to the first node to be charged, and

in a second section of the buck mode, the first flying capacitor is discharged through the first charge sharing path.

7. The switching regulator of claim 1 , wherein the second switching circuit further comprises a second flying capacitor,

in a first section of the boost mode, the second flying capacitor is connected to the first node to be charged, and

in a second section of the boost mode, the second flying capacitor is discharged through the second charge sharing path.

8. The switching regulator of claim 1 , wherein the first switching circuit further comprises a first bootstrap capacitor that boosts the first switching control signal in the boost mode, and

in the boost mode, the first bootstrap capacitor is periodically charged through the second charge sharing path.

9. The switching regulator of claim 1 , wherein the second switching circuit further comprises a second bootstrap capacitor that boosts the second switching control signal in in the buck mode, and

in the buck mode, the second bootstrap capacitor is periodically charged through the first charge sharing path.

10. The switching regulator of claim 1 , wherein the charge sharing circuit comprises:

at least one first power switching element configured to form or block the first charge sharing path; and

at least one second power switching element configured to form or block the second charge sharing path.

11. The switching regulator of claim 1 , wherein a direction in which charges flow in the first charge sharing path is different from a direction in which charges flow in the second charge sharing path.

12. A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising:

a first switching circuit including a first transistor, a first bootstrap capacitor, and a flying capacitor, wherein in a buck mode, the first transistor is configured to selectively connect a first node receiving the input voltage in response to a first switching control signal the input voltage;

a second switching circuit including a second transistor and a second bootstrap capacitor, wherein in the buck mode, the second transistor is configured to selectively connect a second node outputting the output voltage in response to a second switching control signal; and

a charge sharing circuit configured to form a charge sharing path between the flying capacitor and the second bootstrap capacitor, in the buck mode.

13. The switching regulator of claim 12 , wherein in a first section of the buck mode, the flying capacitor is connected to the first node to be charged, and

in a second section of the buck mode, the flying capacitor is discharged through the charge sharing path.

14. The switching regulator of claim 13 , wherein the charge sharing path is blocked in the first section, and

the charge sharing path is formed in the second section.

15. The switching regulator of claim 12 , wherein in a first section of the buck mode, the first bootstrap capacitor is connected to the first node to be charged, and

in a second section of the buck mode, the first bootstrap capacitor boosts the first switching control signal.

16. The switching regulator of claim 12 , wherein in the buck mode, the second bootstrap capacitor is periodically charged through the charge sharing path.

17. A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising:

a first switching circuit including a first transistor and a first bootstrap capacitor, wherein in a boost mode, the first transistor connects a first node receiving the input voltage in response to a first switching control signal, and the first bootstrap capacitor boosts the first switching control signal;

a second switching circuit including a second transistor, a second bootstrap capacitor, and a flying capacitor, wherein in the boost mode, the second transistor is configured to selectively connect a second node outputting the output voltage in response to a second switching control signal; and

a charge sharing circuit configured to form a charge sharing path between the flying capacitor and the first bootstrap capacitor, in the boost mode.

18. The switching regulator of claim 17 , wherein in a first section of the boost mode, the flying capacitor is connected to the first node to be charged, and

in a second section of the boost mode, the flying capacitor is discharged through the charge sharing path.

19. The switching regulator of claim 17 , wherein in a first section of the boost mode, the second bootstrap capacitor is connected to the first node to be charged, and

in a second section of the boost mode, the second bootstrap capacitor boosts the second switching control signal.

20. The switching regulator of claim 17 , wherein in the boost mode, the first bootstrap capacitor is periodically charged through the charge sharing path.

21. A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising:

a first switching circuit including a first transistor connected to a first node receiving the input voltage based on a first switching control signal;

a second switching circuit including a second transistor connected to a second node outputting the output voltage based on a second switching control signal;

a charge sharing circuit configured to control any one of a second charge sharing path for boosting the first switching control signal and a first charge sharing path for boosting the second switching control signal, based on a control signal; and

a controller configured to generate the first switching control signal, the second switching control signal, and the control signal, based on a mode selected from a buck mode and a boost mode.

22. The switching regulator of claim 21 , wherein the first switching circuit further comprises a flying capacitor that is discharged by the first charge sharing path in one section of the buck mode, and

the second switching circuit further comprises a bootstrap transistor that is charged through the first charge sharing path to boost the second switching control signal, in one section of the buck mode.

23. The switching regulator of claim 21 , wherein the first switching circuit further comprises a bootstrap transistor that is charged through the second charge sharing path to boost the first switching control signal, in one section of the boost mode, and

the second switching circuit further comprises a flying capacitor that is discharged through the second charge sharing path, in section of the boost mode.

24. The switching regulator of claim 21 , wherein the controller is further configured to select any one of the buck mode and the boost mode based on a target level of the output voltage.

25. The switching regulator of claim 21 , wherein the first switching circuit further comprises a first bootstrap capacitor that boosts the first switching control signal,

the second switching circuit further comprises a second bootstrap capacitor that boots the second switching control signal, and

the controller is further configured to generate the control signal based on any one of a voltage of the first bootstrap capacitor and a voltage of the second bootstrap capacitor.

26. The switching regulator of claim 25 , wherein the control signal is:

a signal to form the first charge sharing path, in the buck mode, when the voltage of the second bootstrap capacitor is less than a threshold voltage, and

a signal to form the second charge sharing path, in the boost mode, when the voltage of the first bootstrap capacitor is less than the threshold voltage.

Priority Claims (1)
KR 10-2020-0134608 · Oct 16, 2020 · national
Continuity (2)
Continuation 17329226 · May 25, 2021
Related Publication 20230238888A1 · Jul 27, 2023