Managing data integrity using a change in a number of data errors and an amount of time in which the change occurred

1. A method comprising:

performing a first integrity scan of a subset of memory at a first time to determine a first error rate for the subset of memory;

storing the first error rate and the first time;

performing a second integrity scan of the subset of memory at a second time to determine a second error rate for the subset of memory;

determining a difference between the first error rate and the second error rate;

determining a difference between the first time and the second time;

selecting a remedial action using the difference between the first error rate and the second error rate and the difference between the first time and the second time; and

performing the remedial action.

2. The method of claim 1 , further comprising:

determining the second error rate satisfies a rate threshold, wherein the remedial action includes reprogramming data from the subset of memory to a different subset of memory.

3. The method of claim 1 , wherein selecting the remedial action includes prioritization of the remedial action relative to another remedial action for a different subset of memory.

4. The method of claim 1 , wherein the remedial action includes a change of bit density of memory cells in the subset of memory.

5. The method of claim 1 , wherein the remedial action includes a change of data type stored in the subset of memory.

6. The method of claim 1 , wherein the selecting further uses a determination that the second error rate does not satisfy a rate threshold, and wherein the remedial action is adding the subset of memory to a high reliability pool of memory.

7. The method of claim 1 , wherein the remedial action is an adjustment in a rate of data integrity scans of the subset of memory.

8. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

perform a first integrity scan of a subset of memory at a first time to determine a first error rate for the subset of memory;

store the first error rate and the first time;

perform a second integrity scan of the subset of memory at a second time to determine a second error rate for the subset of memory;

determine a difference between the first error rate and the second error rate;

determine a difference between the first time and the second time;

select a remedial action using the difference between the first error rate and the second error rate and the difference between the first time and the second time; and

perform the remedial action.

9. The non-transitory computer-readable storage medium of claim 8 , wherein the processing device is further to:

determine the second error rate satisfies a rate threshold, wherein the remedial action includes reprogramming data from the subset of memory to a different subset of memory.

10. The non-transitory computer-readable storage medium of claim 8 , wherein selecting the remedial action includes prioritization of the remedial action relative to another remedial action for a different subset of memory.

11. The non-transitory computer-readable storage medium of claim 8 , wherein the remedial action includes a change of bit density of memory cells in the subset of memory.

12. The non-transitory computer-readable storage medium of claim 8 , wherein the remedial action includes a change of data type stored in the subset of memory.

13. The non-transitory computer-readable storage medium of claim 8 , wherein the selecting further uses a determination that the second error rate does not satisfy a rate threshold, and wherein the remedial action is adding the subset of memory to a high reliability pool of memory.

14. The non-transitory computer-readable storage medium of claim 8 , wherein the remedial action is an adjustment in a rate of data integrity scans of the subset of memory.

15. A system comprising:

a plurality of memory devices; and

a processing device, operatively coupled with the plurality of memory devices, to:

perform a first integrity scan of a subset of memory at a first time to determine a first error rate for the subset of memory;

store the first error rate and the first time;

perform a second integrity scan of the subset of memory at a second time to determine a second error rate for the subset of memory;

determine a difference between the first error rate and the second error rate;

determine a difference between the first time and the second time;

select a remedial action using the difference between the first error rate and the second error rate and the difference between the first time and the second time, wherein selecting the remedial action includes prioritization of the remedial action relative to another remedial action for a different subset of memory; and

perform the remedial action.

16. The system of claim 15 , wherein the processing device is further to:

determine the second error rate satisfies a rate threshold, wherein the remedial action includes reprogramming data from the subset of memory to a different subset of memory.

17. The system of claim 15 , wherein the remedial action includes a change of bit density of memory cells in the subset of memory.

18. The system of claim 15 , wherein the remedial action includes a change of data type stored in the subset of memory.

19. The system of claim 15 , wherein the selecting further uses a determination that the second error rate does not satisfy a rate threshold, and wherein the remedial action is adding the subset of memory to a high reliability pool of memory.

20. The system of claim 15 , wherein the remedial action is an adjustment in a rate of data integrity scans of the subset of memory.