Data processing method and device and electronic apparatus

1. A dynamic loading system of an off-chip non-volatile memory based on virtual mapping comprising:

the off-chip non-volatile memory;

an on-chip memory;

an on-chip mapping device configured to construct a mapping relationship between a logical partition and a physical partition of the on-chip memory;

a memory access controller configured to parse a memory access of a system into an access to the logical partition, configure a prediction algorithm of data loading, and send a memory loading request to an off-chip memory loading device; and

the off-chip memory loading device configured to construct a mapping relationship between a program partition of the off-chip non-volatile memory and the physical partition of the on-chip memory, the program partition including a plurality of program blocks that are individually configured in size and configured to store an application program.

2. The dynamic loading system according to claim 1 , wherein:

the on-chip memory is an on-chip static memory divided into a plurality of physical partitions.

3. The dynamic loading system according to claim 1 , wherein the off-chip non-volatile memory includes:

a verification partition configured to store verification information;

a configuration partition configured to store the mapping relationship between the program partition of the off-chip non-volatile memory and the physical partition of the on-chip memory and a prediction configuration of the memory access controller; and

the program partition.

4. The dynamic loading system according to claim 1 , wherein:

the memory access controller configures the prediction algorithm according to an access of the system and predicts a logical partition that is to be accessed; and

the prediction algorithm includes:

no prediction, loading a program in response to a partition that is not loaded being accessed;

a single point prediction, generating one or more partition loading requests in response to a certain pre-configured address being accessed; and

a multi-point prediction, generating one or more partition loading requests in response to a plurality of pre-configured addresses being accessed according to a certain sequence.

5. The dynamic loading system of claim 1 , wherein the on-chip mapping device is configured to convert a logical address accessed by the system into a physical address of the on-chip memory and monitor state information of each physical partition of the on-chip memory.

6. The dynamic loading system of claim 1 , wherein the off-chip memory loading device is configured to:

load the program partition of the off-chip volatile memory to the physical partition of the on-chip memory according to memory loading requests directly sent by the memory access controller and the system;

in response to a program block that is requested to be loaded being not loaded in the on-chip memory, start a loading process;

copy the program block to a corresponding physical partition of the on-chip memory and calculate a verification value of a copied content according to a verification need;

compare the calculated verification value with a corresponding value in a verification partition after the program block is copied:

in response to passing verification, change a state of the program block to be loading completed; and

in response to failing the verification, generate an interrupt.

7. A dynamic loading method of an off-chip non-volatile memory based on virtual mapping comprising:

dividing an on-chip memory into a plurality of physical partitions;

dividing the off-chip non-volatile memory into:

a verification partition configured to store verification information;

a configuration partition configured to store a mapping relationship between a program partition of the off-chip non-volatile memory and a physical partition of the on-chip memory and a prediction configuration of a memory access controller; and

the program partition including a plurality of program blocks that are individually configured in size and configured to store an application program;

configuring mapping relationships of various partitions;

generating a memory loading request by selecting a prediction algorithm;

loading and verifying a program according to the memory loading request; and

executing the program and generating a next memory loading request.

8. The dynamic loading method according to claim 7 , wherein configuring the mapping relationships of the various partitions further includes:

configuring a mapping relationship between a logical partition and a physical partition of an on-chip memory by an on-chip mapping device; and

configuring a mapping relationship between a program partition of the off-chip non-volatile memory and the physical partition of the on-chip memory by an off-chip memory loading device.

9. The dynamic loading method according to claim 7 , wherein loading and verifying the program according to the memory loading request includes:

copying a program block to a corresponding physical partition of an on-chip memory according to the memory loading request and a mapping relationship between a program partition of the off-chip non-volatile memory and the physical partition of the on-chip memory and calculating a verification value of a copied content according to a verification need;

comparing the calculated verification value with a corresponding value in a verification partition after the program block is copied:

in response to passing verification, changing a state of the program block to be loading completed; and

in response to failing the verification, generating an interrupt.