Transformer design with balanced interwinding capacitance for improved EMI performance
An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.
1. An electronic device, comprising:
a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers, the core layer and the dielectric layers extending in respective planes of orthogonal first and second directions and stacked along a third direction that is orthogonal to the first and second directions, the conductive features including:
a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn, the first and final turns of the first winding spaced apart from one another and adjacent to one another in the same metal layer of the first pair; and
a second patterned conductive feature having multiple conductive turns in each of a second pair of the metal layers to form a second winding having a first turn and a final turn, the core layer positioned between the first and second patterned conductive features along the third direction;
a semiconductor die electrically coupled to the multilevel lamination structure; and
a package structure that encloses the multilevel lamination structure and the semiconductor die.
2. The electronic device of claim 1 , wherein the first and final turns of the second winding are spaced apart from one another and adjacent to one another in the same metal layer of the second pair.
3. The electronic device of claim 2 , wherein:
the first turn of the first winding is at least partially aligned with the first turn of the second winding along the third direction; and
the final turn of the first winding is at least partially aligned with the final turn of the second winding along the third direction.
4. The electronic device of claim 3 , the conductive features of the multilevel lamination structure further including a patterned shield having multiple conductive turns in an inner metal layer to form a shield, the shield positioned between the core layer and the first pair along the third direction.
5. The electronic device of claim 4 , the conductive features of the multilevel lamination structure further including a second patterned shield having multiple conductive turns in a second inner metal layer to form a second shield, the second shield positioned between the core layer and the second pair along the third direction.
6. The electronic device of claim 2 , the conductive features of the multilevel lamination structure further including a patterned shield having multiple conductive turns in an inner metal layer to form a shield, the shield positioned between the core layer and the first pair along the third direction.
7. The electronic device of claim 1 , wherein:
the first turn of the first winding is at least partially aligned with the first turn of the second winding along the third direction; and
the final turn of the first winding is at least partially aligned with the final turn of the second winding along the third direction.
8. The electronic device of claim 7 , the conductive features of the multilevel lamination structure further including a patterned shield having multiple conductive turns in an inner metal layer to form a shield, the shield positioned between the core layer and the first pair along the third direction.
9. The electronic device of claim 8 , the conductive features of the multilevel lamination structure further including a second patterned shield having multiple conductive turns in a second inner metal layer to form a second shield, the second shield positioned between the core layer and the second pair along the third direction.
10. The electronic device of claim 1 , the conductive features of the multilevel lamination structure further including a patterned shield having multiple conductive turns in an inner metal layer to form a shield, the shield positioned between the core layer and the first pair along the third direction.
11. The electronic device of claim 1 , further comprising a magnetic core structure attached to a side of the multilevel lamination structure.
12. A magnetic assembly, comprising:
a core layer;
dielectric layers; and
conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers, the core layer and the dielectric layers extending in respective planes of orthogonal first and second directions and stacked along a third direction that is orthogonal to the first and second directions, the conductive features including:
a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn, the first and final turns of the first winding spaced apart from one another and adjacent to one another in the same metal layer of the first pair; and
a second patterned conductive feature having multiple conductive turns in each of a second pair of the metal layers to form a second winding having a first turn and a final turn, the core layer positioned between the first and second patterned conductive features along the third direction.
13. The magnetic assembly of claim 12 , further comprising a magnetic core structure attached to a side of the multilevel lamination structure.
14. The magnetic assembly of claim 12 , wherein the first and final turns of the second winding are spaced apart from one another and adjacent to one another in the same metal layer of the second pair.
15. The magnetic assembly of claim 14 , wherein:
the first turn of the first winding is at least partially aligned with the first turn of the second winding along the third direction; and
the final turn of the first winding is at least partially aligned with the final turn of the second winding along the third direction.
16. The magnetic assembly of claim 14 , the conductive features of the multilevel lamination structure further including a patterned shield having multiple conductive turns in an inner metal layer to form a shield, the shield positioned between the core layer and the first pair along the third direction.
17. The magnetic assembly of claim 12 , wherein:
the first turn of the first winding is at least partially aligned with the first turn of the second winding along the third direction; and
the final turn of the first winding is at least partially aligned with the final turn of the second winding along the third direction.
18. The magnetic assembly of claim 12 , the conductive features of the multilevel lamination structure further including a patterned shield having multiple conductive turns in an inner metal layer to form a shield, the shield positioned between the core layer and the first pair along the third direction.
19. A method for fabricating an electronic device, the method comprising:
fabricating a multilevel lamination structure including: a core layer; dielectric layers; and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers, the core layer and the dielectric layers extending in respective planes of orthogonal first and second directions and stacked along a third direction that is orthogonal to the first and second directions, the conductive features including: a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn, the first and final turns of the first winding spaced apart from one another and adjacent to one another in the same metal layer of the first pair; and a second patterned conductive feature having multiple conductive turns in each of a second pair of the metal layers to form a second winding having a first turn and a final turn, the core layer positioned between the first and second patterned conductive features along the third direction;
coupling a semiconductor die to one of the first and second windings; and
enclosing the multilevel lamination structure and the semiconductor die in a package structure.
20. The method of claim 19 , further comprising attaching a magnetic core structure to a side of the multilevel lamination structure.