Planar transformer employing insulating structure for performance improvement
View Patent ↗A planar transformer employing an insulating structure for performance improvement includes: a pair of ferrite cores ( 110 ) including an upper core ( 110 - 1 ) and a lower core ( 110 - 2 ); a printed circuit board ( 120 ), which is disposed between the pair of ferrite cores ( 110 ), one end of which has primary via holes ( 121 ) electrically connecting primary coil patterns, and the other end of which has secondary via holes ( 123 ) electrically connecting secondary coil patterns; an insulating block ( 130 - 1 ) for receiving one side of the pair of ferrite cores ( 110 ); and an insulating base ( 130 - 2 ) disposed in the pair of ferrite cores ( 110 ) and fittedly coupled to the insulating block ( 130 - 1 ), wherein the insulating block ( 130 - 1 ) and the insulating base ( 130 - 2 ) receive a given region of the printed circuit board ( 120 ) at one side at which the secondary via holes ( 123 ) is disposed.
1. A planar transformer employing an insulating structure for performance improvement, comprising:
a pair of ferrite cores ( 110 ) constituted of an upper core ( 110 - 1 ) and a lower core ( 110 - 2 );
a printed circuit board ( 120 ) disposed between the pair of ferrite cores ( 110 ) and having primary via holes ( 121 ) formed on one end thereof in such a manner as to be electrically connected to primary coil patterns and secondary via holes ( 123 ) formed on the other end thereof in such a manner as to be electrically connected to secondary coil patterns;
an insulating block ( 130 - 1 ) for accommodating one side of the pair of ferrite cores ( 110 ); and
an insulating base ( 130 - 2 ) disposed at the inside of the pair of ferrite cores ( 110 ) in such a manner as to be fitted to the insulating block ( 130 - 1 ),
wherein the insulating block ( 130 - 1 ) and the insulating base ( 130 - 2 ) accommodate a given region of the printed circuit board ( 120 ) on one side where the secondary via holes ( 123 ) are formed.
2. The planar transformer according to claim 1 , wherein the insulating base ( 130 - 2 ) comprises:
a first insulating base surface ( 135 ) coming into contact with middle legs ( 112 ) of the pair of ferrite cores ( 110 ); and
second insulating base surfaces ( 136 ) extended from the first insulating base surface ( 135 ) in such a manner as to come into contact with top and underside of the printed circuit board ( 120 ).
3. The planar transformer according to claim 2 , wherein the insulating block ( 130 - 1 ) comprises first insulating block surfaces 137 inserted into one side of the pair of ferrite cores ( 110 ) in such a manner as to be fitted to the second insulating base surfaces ( 136 ).
4. The planar transformer according to claim 3 , wherein the insulating block ( 130 - 1 ) further comprises a second insulating block surface ( 138 ) inserted into one side of the pair of ferrite cores ( 110 ) in such a manner as to accommodate given portions of the exposed surfaces of the upper core ( 110 - 1 ) and the lower core ( 110 - 2 ) to the outside.
5. The planar transformer according to claim 3 , wherein the upper core ( 110 - 1 ) and the lower core ( 110 - 2 ) each comprise an accommodation surface ( 116 ) formed on the inner side surface onto which the printed circuit board ( 120 ) is located in such a manner as to seat the second insulating base surfaces ( 136 ) and the first insulating block surfaces ( 137 ) fitted to each other thereonto.
6. The planar transformer according to claim 4 , wherein shortest linear distance from the outer surfaces of the middle legs ( 112 ) to the secondary via holes ( 123 ) is shorter than 7 mm.
7. The planar transformer according to claim 4 , wherein the insulating block ( 130 - 1 ) further comprises a third insulating block surface ( 139 ) adapted to connect the first insulating block surfaces ( 137 ) and the second insulating block surface ( 138 ) to each other, and the third insulating block surface ( 139 ) has a hole ( 139 - 1 ) formed thereon to allow a given region of the printed circuit board ( 120 ) on which the secondary via holes ( 123 ) are formed to be exposed to the outside of the pair of ferrite cores ( 110 ).