Low power hybrid reverse bandgap reference and digital temperature sensor
A low power hybrid reverse (LPHR) bandgap reference (BGR) and digital temperature sensor (DTS) or a digital thermometer, which utilizes subthreshold metal oxide semiconductor (MOS) transistor and the PNP parasitic Bi-polar Junction Transistor (BJT) device to form a reverse BGR that serves as the base for configurable BGR or DTS operating modes. The LPHR architecture uses low-cost MOS transistors and the standard parasitic PNP device. Based on a reverse bandgap voltage, the LPHR can work as a configurable BGR. By comparing the configurable BGR with the scaled base-emitter voltage, the circuit can also perform as a DTS with a linear transfer function with single-temperature trim for high accuracy.
1. An apparatus comprising:
a first resistor;
an amplifier having a first input coupled to the first resistor, and a second input to receive a scaled emitter-base voltage; and
a second resistor having variable resistance, wherein the second resistor is coupled to the first input and an output of the amplifier, wherein the output of the amplifier is a bandgap reference.
2. The apparatus of claim 1 , wherein the amplifier is an unbalanced amplifier having imbalanced input pair size or imbalanced biasing currents.
3. The apparatus of claim 1 , wherein the amplifier comprises:
a first input transistor having a first size;
a second input transistor having a second size, wherein the first size is n times larger than the second size;
a current mirror coupled to the first input transistor and the second input transistor; and
a current source coupled to the first input transistor and the second input transistor.
4. The apparatus of claim 3 , wherein the current mirror comprises:
a third transistor which is diode-connected and coupled to the first input transistor, wherein the third transistor has a third size; and
a fourth transistor coupled to the third transistor and the second input transistor, wherein the fourth transistor has a fourth size, wherein the fourth size is m times larger than the third size.
5. The apparatus of claim 1 , wherein the scaled emitter-base voltage is a first scaled emitter-base voltage, wherein the apparatus comprises a comparator to compare the output of the amplifier with a second scaled emitter-base voltage.
6. The apparatus of claim 5 comprises a successive approximation logic to receive an output of the comparator and to generate a digital code, wherein the digital code changes according to the output of the comparator.
7. The apparatus of claim 6 , wherein the digital code is a first digital code, wherein the apparatus comprises a multiplexer to select one of the first digital code or a second digital code, wherein an output of the multiplexer is to adjust the variable resistance of the second resistor.
8. The apparatus of claim 7 , wherein when the multiplexer selects the first digital code, the first digital code indicates a temperature of the apparatus.
9. The apparatus of claim 5 comprising a circuitry to generate the first scaled emitter-base voltage and the second scaled emitter-base voltage, wherein the circuitry comprises:
a resistor divider;
a current source coupled to the resistor divider; and
a transistor coupled to the current source and the resistor divider, wherein the resistor divider has a first tap to provide the first scaled emitter-base voltage and a second tap to provide the second scaled emitter-base voltage.
10. The apparatus of claim 9 , wherein the transistor is one of a PNP BJT or a PMOS transistor.
11. An apparatus comprising:
an amplifier having an imbalanced input pair size or imbalanced biasing currents, wherein a voltage difference between inputs of the amplifier is a proportional-to-absolute-temperature (PTAT) voltage, and wherein an output of the amplifier is a bandgap voltage; and
a comparator coupled to the output of the amplifier, wherein the comparator to compare the bandgap voltage with a scaled emitter-base voltage.
12. The apparatus of claim 11 , wherein the scaled emitter-base voltage is a first scaled emitter-base voltage, wherein the inputs of the amplifier include:
a first input coupled to a first resistor and a second resistor; and
a second input to receive a second first scaled emitter-based voltage.
13. The apparatus of claim 12 , wherein the amplifier comprises:
a first input transistor having a first size, wherein the first input transistor is coupled to the second input;
a second input transistor having a second size, wherein the second input transistor is coupled to the first input, wherein the first size is n times larger than the second size;
a current mirror coupled to the first input transistor and the second input transistor; and
a current source coupled to the first input transistor and the second input transistor.
14. The apparatus of claim 13 , wherein the current mirror comprises:
a third transistor which is diode-connected and coupled to the first input transistor, wherein the third transistor has a third size; and
a fourth transistor coupled to the third transistor and the second input transistor, wherein the fourth transistor has a fourth size, wherein the fourth size is m times larger than the third size.
15. The apparatus of claim 11 comprises a successive approximation logic to receive an output of the comparator and to generate a digital code, wherein the digital code changes according to the output of the comparator.
16. A system comprising:
a memory;
a processor coupled to the memory; and
a wireless interface to allow the processor to communicate with another device, wherein the processor includes an apparatus operable to function as bandgap reference or a digital thermometer, wherein the apparatus includes:
a first resistor;
an amplifier having a first input coupled to the first resistor, and a second input to receive a scaled emitter-base voltage; and
a second resistor having variable resistance, wherein the second resistor is coupled to the first input and an output of the amplifier, wherein the output of the amplifier is a bandgap reference.
17. The system of claim 16 , wherein the amplifier is an unbalanced amplifier having imbalanced input pair size or imbalanced biasing currents.
18. The system of claim 16 , wherein the amplifier comprises:
a first input transistor having a first size;
a second input transistor having a second size, wherein the first size is n times larger than the second size;
a current mirror coupled to the first input transistor and the second input transistor; and
a current source coupled to the first input transistor and the second input transistor.
19. The system of claim 18 , wherein the current mirror comprises:
a third transistor which is diode-connected and coupled to the first input transistor, wherein the third transistor has a third size; and
a fourth transistor coupled to the third transistor and the second input transistor, wherein the fourth transistor has a fourth size, wherein the fourth size is m times larger than the third size.
20. The system of claim 16 , wherein the scaled emitter-base voltage is a first scaled emitter-base voltage, wherein the apparatus comprises a comparator to compare the output of the amplifier with a second scaled emitter-base voltage.