Display substrate, preparation method therefor and display apparatus

1. A display substrate, comprising a plurality of sub-pixels arranged in a matrix, wherein each sub-pixel is provided with a pixel drive circuit comprising a plurality of thin film transistors and a storage capacitor, the storage capacitor of a present sub-pixel in the plurality of sub-pixels and the storage capacitor of an adjacent sub-pixel adjacent to the present sub-pixel are disposed in a shared capacitance region of the present sub-pixel and the adjacent sub-pixel, and the storage capacitor of the present sub-pixel and the storage capacitor of the adjacent sub-pixel are disposed as stacked layers,

wherein the pixel drive circuit comprises:

a base substrate;

a light shield layer and a first electrode disposed on the base substrate, wherein the first electrode is disposed in the shared capacitance region;

a first insulating layer covering the light shield layer and the first electrode;

an active layer disposed on the first insulating layer;

a second insulating layer covering the active layer; and

gate electrodes and a second electrode disposed on the second insulating layer, wherein the second electrode is disposed in the shared capacitance region, and the first electrode and the second electrode form the storage capacitor of the present sub-pixel,

wherein the pixel drive circuit further comprises:

a third insulating layer covering the gate electrodes and the second electrode;

source electrodes, drain electrodes and a third electrode disposed on the third insulating layer, wherein the third electrode is disposed in the shared capacitance region;

a fourth insulating layer and a fifth insulating layer covering the source electrodes, the drain electrodes and the third electrode; and

a pixel electrode and a fourth electrode disposed on the fifth insulating layer, wherein the fourth electrode is disposed in the shared capacitance region, and the third electrode and the fourth electrode form the storage capacitor of the adjacent sub-pixel,

wherein the pixel drive circuit further comprises a switch scan line, a compensation scan line and a data line, and the shared capacitance region is disposed between two data lines in a horizontal direction and between the switch scan line and the compensation scan line in a vertical direction.

2. The display substrate of claim 1 , wherein the storage capacitor of the present sub-pixel comprises:

a first electrode disposed in a same layer as a light shield layer in the pixel drive circuit, an insulating layer covering the first electrode, and a second electrode disposed in a same layer as gate electrodes of the thin film transistors.

3. The display substrate of claim 1 , wherein the storage capacitor of the adjacent sub-pixel comprises:

a third electrode disposed in a same layer as source and drain electrodes of the thin film transistors, an insulating layer covering the third electrode, and a fourth electrode disposed in a same layer as a pixel electrode.

4. The display substrate of claim 1 , wherein the plurality of thin film transistors comprise a first thin film transistor, a second thin film transistor and a third thin film transistor,

the first thin film transistor comprises a first active layer, a first gate electrode, a first source electrode and a first drain electrode,

the second thin film transistor comprises a second active layer, a second gate electrode, a second source electrode and a second drain electrode, and

the third thin film transistor comprises a third active layer, a third gate electrode, a third source electrode and a third drain electrode.

5. The display substrate of claim 4 , wherein in the present sub-pixel, the first electrode and the light shield layer are in an integrated structure, and the first electrode is connected to the first drain electrode and the third drain electrode through a via hole; the second electrode and the first gate electrode are in an integrated structure, and the second electrode is connected to the second drain electrode through a via hole.

6. The display substrate of claim 4 , wherein in the adjacent sub-pixel, the third electrode is connected to the first gate electrode and the second drain electrode through a via hole, the fourth electrode and the pixel electrode are in an integrated structure, and the fourth electrode is connected to the first drain electrode and the third drain electrode through a via hole.

7. The display substrate of claim 1 , further comprising a color filter layer, wherein the color filter layer is disposed between the fourth insulating layer and the fifth insulating layer, the fifth insulating layer is opened with a via hole exposing the fourth insulating layer, and the fourth electrode is disposed in the via hole.

8. A display apparatus, comprising a display substrate according to claim 1 .

9. A method for preparing a display substrate, comprising:

forming a plurality of sub-pixels arranged in a matrix, forming a pixel drive circuit comprising a plurality of thin film transistors and a storage capacitor in each sub-pixel, wherein the storage capacitor of a present sub-pixel in the plurality of sub-pixels and the storage capacitor of an adjacent sub-pixel adjacent to the present sub-pixel are formed in a shared capacitance region of the present sub-pixel and the adjacent sub-pixel, and the storage capacitor of the present sub-pixel and the storage capacitor of the adjacent sub-pixel are disposed as stacked layers,

wherein forming the pixel drive circuit comprises:

forming a light shield layer and a first electrode on a base substrate, wherein the first electrode is formed in the shared capacitance region;

forming a first insulating layer covering the light shield layer and the first electrode;

forming an active layer on the first insulating layer;

forming a second insulating layer covering the active layer; and

forming gate electrodes and a second electrode on the second insulating layer, wherein the second electrode is formed in the shared capacitance region, and the first electrode and the second electrode form the storage capacitor of the present sub-pixel, wherein forming the pixel drive circuit further comprises:

forming a third insulating layer covering the gate electrodes and the second electrode;

forming source electrodes, drain electrodes and a third electrode on the third insulating layer, wherein the third electrode is formed in the shared capacitance region;

forming a fourth insulating layer and a fifth insulating layer covering the source electrodes, the drain electrodes and the third electrode; and

forming a pixel electrode and a fourth electrode on the fifth insulating layer, wherein the fourth electrode is formed in the shared capacitance region, and the third electrode and the fourth electrode form the storage capacitor of the adjacent sub-pixel,

wherein forming the fourth insulating layer and the fifth insulating layer covering the source electrodes, the drain electrodes and the third electrode comprises:

forming the fourth insulating layer covering the source electrodes, the drain electrodes and the third electrode;

forming a color filter layer on the fourth insulating layer;

forming the fifth insulating layer covering the color filter layer, forming a via hole exposing the fourth insulating layer on the fifth insulating layer, wherein the via hole is configured to dispose the fourth electrode.

10. The method for preparing the display substrate of claim 9 , wherein forming the storage capacitor of the present sub-pixel in the shared capacitance region, comprises:

forming a first electrode disposed in a same layer as a light shield layer in the pixel drive circuit, wherein the first electrode is formed in the shared capacitance region;

forming an insulating layer covering the first electrode; and

forming a second electrode disposed in a same layer as gate electrodes of the thin film transistors, wherein the second electrode is formed in the shared capacitance region.

11. The method for preparing the display substrate of claim 9 , wherein forming the storage capacitor of the adjacent sub-pixel in the shared capacitance region, comprises:

forming a third electrode disposed in a same layer as source and drain electrodes of the thin film transistors, wherein the third electrode is formed in the shared capacitance region;

forming an insulating layer covering the third electrode; and

forming a fourth electrode disposed in a same layer as a pixel electrode, wherein the fourth electrode is formed in the shared capacitance region.

12. The method for preparing the display substrate of claim 9 , wherein,

forming the light shield layer and the first electrode on the base substrate comprises forming a light shield layer of the present sub-pixel and a light shield layer of the adjacent sub-pixel on the base substrate, wherein the light shield layer of the present sub-pixel and the first electrode are in an integrated structure;

forming the gate electrodes and the second electrode on the second insulating layer comprises forming a first, a second and a third gate electrodes of the present sub-pixel and a first, a second and a third gate electrodes of the adjacent sub-pixel on the second insulating layer, wherein the first gate electrode of the present sub-pixel and the second electrode are in an integrated structure; and

forming the pixel electrode and the fourth electrode on the fifth insulating layer comprises forming a pixel electrode of the present sub-pixel and a pixel electrode of the adjacent sub-pixel on the fifth insulating layer, wherein the pixel electrode of the adjacent sub-pixel and the fourth electrode are in an integrated structure and the pixel electrode of the adjacent sub-pixel are connected to a first drain electrode and a third drain electrode of the adjacent sub-pixel through a via hole.

13. The method for preparing the display substrate of claim 12 , wherein forming source electrodes, drain electrodes and a third electrode on the third insulating layer comprises:

forming a data line, a compensation line, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode, a third source electrode, a third drain electrode and the third electrode on the third insulating layer.

14. The method for preparing the display substrate of claim 13 , wherein,

the compensation line is connected to a connection line through a via hole;

the first source electrode is connected to a first active layer through a via hole, and the first drain electrode is simultaneously connected to the first active layer and the light shield layer through a via hole, so that the first drain electrode of the present sub-pixel is connected to the first electrode;

the second source electrode and the data line are in an integrated structure, the second source electrode is connected to a second active layer through a via hole, and the second drain electrode is simultaneously connected to the second active layer and the first gate electrode through the via hole, to make the second drain electrode of the present sub-pixel be connected to the second electrode;

the third source electrode is simultaneously connected to the connection line and a third active layer through a via hole, and the third drain electrode is simultaneously connected to the third active layer and the light shield layer through the via hole, to make the third drain electrode of the present sub-pixel be connected to the first electrode; and

the third electrode is connected to the first gate electrode of the adjacent sub-pixel through a via hole.