Semiconductor structure and method for forming the same
A method for forming a semiconductor structure is provided. The method includes forming a fin structure over a substrate. The fin structure includes a protection layer and alternating first and second semiconductor layers over the protection layer. The method also includes etching the fin structure to form a source/drain recess, forming a sacrificial contact in the source/drain recess, forming a source/drain feature over the sacrificial contact in the source/drain recess, removing the first semiconductor layers of the fin structure, thereby forming a plurality of nanostructures, forming a gate stack wrapping around the nanostructures, removing the substrate thereby exposing the protection layer and the sacrificial contact and replacing the sacrificial contact with a contact plug.
1. A method for forming a semiconductor structure, comprising:
sequentially stacking a first SiGe layer and a first Si layer over a substrate;
alternatingly stacked second SiGe layers and second Si layers over first Si layer, wherein a germanium concentration of the first SiGe layer is lower than a germanium concentration of the second SiGe layers;
patterning the second Si layers, the second SiGe layers, the first Si layer, the first SiGe layer and the substrate to form a fin structure;
forming a first source/drain recess in the fin structure;
forming a sacrificial contact in the first source/drain recess;
forming an etching stop layer on the sacrificial contact in the first source/drain recess;
forming a first source/drain feature on the etching stop layer in the first source/drain recess;
removing the second SiGe layers and the first Si layer to form gaps; and
forming a gate stack to fill the gaps.
2. The method for forming the semiconductor structure as claimed in claim 1 , further comprising:
turning the substrate upside down;
removing the substrate;
removing the first SiGe layer;
removing the sacrificial contact and the etching stop layer to expose a bottom surface of the first source/drain feature; and
forming a contact plug landing on the bottom surface of the first source/drain feature.
3. The method for forming the semiconductor structure as claimed in claim 1 , further comprising:
forming a second source/drain recess in the fin structure, wherein the second source/drain recess is shallower than the first source/drain recess;
forming a second source/drain feature in the second source/drain recess; and
forming a contact plug landing on a top surface of the second source/drain feature.
4. The method for forming the semiconductor structure as claimed in claim 1 , wherein the etching stop layer in direct contact a sidewall of the first SiGe layer.
5. A method for forming a semiconductor structure, comprising:
forming a fin structure in which a first SiGe layer, a second SiGe layer and a Si layer are sequentially stacked over a fin element;
forming a sacrificial contact through the fin element;
forming a source/drain feature over the sacrificial contact through the Si semiconductor layer and the second SiGe layer;
removing the second SiGe layer;
forming a gate stack to surround the Si layer;
replacing the fin element with an insulating layer;
removing the sacrificial contact to form an opening; and
forming a contact plug in the opening.
6. The method for forming the semiconductor structure as claimed in claim 5 , wherein a germanium concentration of the first SiGe layer is lower than a germanium concentration of the second SiGe layer.
7. The method for forming the semiconductor structure as claimed in claim 5 , further comprising:
forming a dielectric lining layer between the insulating layer and the sacrificial contact.
8. The method for forming the semiconductor structure as claimed in claim 5 , further comprising:
laterally enlarging the opening.
9. The method for forming the semiconductor structure as claimed in claim 5 , wherein replacing the fin element with the insulating layer comprises:
removing the fin element to expose the first SiGe layer and the sacrificial contact; and
forming the insulating layer to surround the sacrificial contact.
10. The method for forming the semiconductor structure as claimed in claim 9 , further comprising, after removing the fin element and before forming the insulating layer:
forming a spacer layer alongside the sacrificial contact;
removing the first SiGe layer to expose the gate stack; and
removing the spacer layer.
11. The method for forming the semiconductor structure as claimed in claim 5 , further comprising:
forming a source/drain recess through the fin structure;
forming the sacrificial contact in the source/drain recess;
forming an etching stop layer on the sacrificial contact in the source/drain recess; and
forming the source/drain feature on the semiconductor etching stop layer in the source/drain recess.
12. The method for forming the semiconductor structure as claimed in claim 11 , further comprising:
removing the etching stop layer to expose the source/drain feature before forming the contact plug in the opening.
13. A method for forming a semiconductor structure, comprising:
forming a fin structure over a substrate, the fin structure including a protection layer and alternating first semiconductor layers and second semiconductor layers over the protection layer;
etching the fin structure to form a source/drain recess;
forming a sacrificial contact in the source/drain recess;
forming a source/drain feature over the sacrificial contact in the source/drain recess;
removing the first semiconductor layers of the fin structure, thereby forming a plurality of nanostructures from the second semiconductor layers of the fin structure;
forming a gate stack wrapping around the nanostructures;
removing the substrate thereby exposing the protection layer and the sacrificial contact;
etching the protection layer thereby exposing the gate stack; and
replacing the sacrificial contact with a contact plug.
14. The method for forming the semiconductor structure as claimed in claim 13 , wherein the sacrificial contact is formed to have an upper surface above a bottom surface of the protection layer.
15. The method for forming the semiconductor structure as claimed in claim 13 , wherein the sacrificial contact is formed to have an upper surface below a bottom surface of the protection layer.
16. The method for forming the semiconductor structure as claimed in claim 13 , wherein forming the source/drain feature comprises:
forming a buffer layer over the sacrificial contact; and
forming a bulk layer over the buffer layer.
17. The method for forming the semiconductor structure as claimed in claim 16 , further comprising:
forming an insulating layer to surround the sacrificial contact;
etching the sacrificial contact and the buffer layer to form a contact opening; and
forming the contact plug in the contact opening.
18. The method for forming the semiconductor structure as claimed in claim 17 , further comprising:
forming a spacer layer along a sidewall of the sacrificial contact, wherein a first portion of the protection layer uncovered by the spacer layer is etched while a second portion of the protection layer covered by the spacer layer remains as a protection feature.
19. The method for forming the semiconductor structure as claimed in claim 18 , further comprising:
removing the protection feature after etching the sacrificial contact and before etching the buffer layer.
20. The method for forming the semiconductor structure as claimed in claim 18 , wherein a first portion of the buffer layer uncovered by the protection feature is etched while a second portion of the buffer layer covered by the protection feature remains.