Display device

1. A display device, comprising:

a substrate comprising a display region and a non-display region;

a plurality of pixels provided in the display region, at least one pixel among the plurality of pixels including a first transistor, a storage capacitor, and a light emitting element having an anode electrically connected to the first transistor; and

a power portion applying a first power voltage to the pixels, the power portion including a first sub-power portion, a second sub-power portion, and a third sub-power portion disposed on different layers from each other,

wherein:

the first transistor includes a first active pattern disposed on the substrate and a first gate electrode overlapping the first active pattern, and

the first gate electrode is configured to be a lower electrode of the storage capacitor,

wherein:

the first sub-power portion is disposed on the first gate electrode with a first insulating layer interposed therebetween and includes an upper electrode of the storage capacitor,

the second sub-power portion is disposed on the first sub-power portion with a second insulating layer interposed therebetween, and

the third sub-power portion is disposed on the second sub-power portion with a third insulating layer interposed therebetween,

wherein at least one of the first to third sub-power portions has a mesh shape in the display region,

wherein each of the first, second, and third sub-power portions is disposed in the display region.

2. The display device of claim 1 , wherein the anode overlaps the third sub-power portion.

3. The display device of claim 1 , wherein the third sub-power portion has the mesh shape in the display region.

4. The display device of claim 2 , wherein the at least one of the first to third sub-power portions includes a first portion extending in a first direction and a second portion extending in a second direction crossing the first direction.

5. The display device of claim 1 , further comprising:

a scan line connected to the at least one pixel among the plurality of pixels and applying a scan signal to the at least one pixel;

a data line connected to the at least one pixel among the plurality of pixels and applying a data signal to the at least one pixel; and

a second transistor connected between the data line and a first electrode of the first transistor, the second transistor being turned on by the scan signal,

wherein the data line overlaps the third sub-power portion.

6. The display device of claim 5 , wherein the data line is disposed in a same layer as the second sub-power portion, and the scan line is disposed in a same layer as the first gate electrode.

7. The display device of claim 5 , wherein the first transistor overlaps the third sub-power portion.

8. The display device of claim 7 , wherein the first active pattern of the first transistor overlaps the third sub-power portion.

9. The display device of claim 8 , wherein the each of the first, second, and third sub-power portions overlaps the first active pattern of the first transistor.

10. The display device of claim 9 , wherein each of the plurality of pixels includes a region where the first sub-power portion, the second sub-power portion, the third sub-power portion, and the data line overlap each other.

11. The display device of claim 10 , wherein:

the third sub-power portion is electrically connected to the second sub-power portion through at least one contact hole penetrating the third insulating layer; and

the at least one contact hole overlaps the first sub-power portion.

12. The display device of claim 11 , further comprising:

an emission control line connected to the at least one pixel among the plurality of pixels and applying an emission control signal to the at least one pixel;

a third transistor connected between a second electrode of the first transistor and the anode, the third transistor being turned on by the emission control signal supplied to the emission control line;

a bridge pattern disposed between the third transistor and the anode; and

a contact line disposed between the third transistor and the bridge pattern.

13. The display device of claim 12 , further comprising:

a fourth transistor connected between the first transistor and the second sub-power portion, the fourth transistor being turned on by the emission control signal,

wherein:

the fourth transistor is electrically connected to the second sub-power portion to receive the first power voltage; and

in a plan view, the at least one contact hole does not overlap the fourth transistor.

14. The display device of claim 13 , wherein one electrode of the third transistor is electrically connected to the anode through the contact line and the bridge pattern.

15. The display device of claim 14 , wherein the contact line is disposed in a same layer as the second sub-power portion, and the bridge pattern is disposed in a same layer as the third sub-power portion.

16. The display device of claim 1 , wherein the third sub-power portion extends to the non-display region.

17. The display device of claim 16 , further comprising:

a first driving voltage line which is provided in the non-display region,

wherein the first driving voltage line is electrically connected to the third sub-power portion.

18. The display device of claim 17 , further comprising:

a second driving voltage line which is provided in the non-display region and applies a second power voltage to each of the plurality of pixels,

wherein the first power voltage is higher than the second power voltage.

19. The display device of claim 1 , wherein the third sub-power portion is disposed between the anode and the second sub-power portion.