Semiconductor structure and manufacturing method for the same

1. A method for fabricating a semiconductor structure, comprising:

forming a bottom terminal;

forming a first middle terminal over the bottom terminal;

forming a top terminal over the first middle terminal;

forming a first passivation layer over the top terminal;

forming a first recess penetrating the first passivation layer and the bottom terminal by using a photomask;

forming a dummy layer over the first passivation layer;

forming an opening in the dummy layer and over the first recess;

forming a conductive material in the first recess and the opening; and

removing the dummy layer subsequent to forming the conductive material.

2. The method of claim 1 , wherein a top surface of the first passivation layer is exposed after removing the dummy layer.

3. The method of claim 1 , further comprising forming a second passivation layer over the first passivation layer and the conductive material.

4. The method of claim 3 , wherein a portion of a sidewall of the conductive material is in direct contact with the second passivation layer.

5. The method of claim 3 , further comprising forming an etch stop layer over the second passivation layer, wherein the etch stop layer is free from being in direct contact with the conductive material.

6. The method of claim 1 , wherein a width of the opening is greater than a width of the recess.

7. The method of claim 1 , further comprising forming a conductive contact over the conductive material.

8. The method of claim 1 , further comprising forming a second recess penetrating the first middle terminal; and forming the conductive material in the second recess simultaneously with the formation of the conductive material in the first recess and the opening.

9. The method of claim 1 , further comprising performing a planarization operation over the dummy layer.

10. A method for fabricating a semiconductor structure, comprising:

forming a first passivation layer;

forming a capacitor stack over the first passivation layer;

forming a second passivation layer over the capacitor stack;

forming a recess penetrating the first and the second passivation layer;

forming a sacrificial layer over the second passivation layer;

forming an opening in the sacrificial layer, wherein the opening is aligned with the recess;

forming a conductive via in the recess; and

forming a conductive post in the opening;

removing the sacrificial layer subsequent to the formations of the conductive via and the conductive post.

11. The method of claim 10 , further comprising exposing a sidewall of the conductive post by removing the sacrificial layer.

12. The method of claim 10 , further comprising performing a planarization operation over the sacrificial layer after forming the conductive post in the opening.

13. The method of claim 12 , wherein removing the sacrificial layer is performed subsequent to the planarization operation.

14. The method of claim 10 , further comprising forming a third passivation layer over the conductive post.

15. The method of claim 14 , wherein the third passivation layer has a top surface above a top surface of the conductive post.

16. A method for fabricating a semiconductor structure, comprising:

forming a first passivation layer;

forming a bottom terminal over the first passivation layer;

forming a first middle terminal over the bottom terminal;

forming a top terminal over the first middle terminal;

forming a second passivation layer over the top terminal;

forming a recess penetrating the first passivation layer and the second passivation layer;

forming a sacrificial layer over the second passivation layer, wherein an opening of the sacrificial layer is connected to the recess and exposes a portion of a top surface of the second passivation layer;

forming an adhesion layer on a sidewall of the recess and the exposed portion of the top surface of the second passivation layer; and

filling the recess with a conductive material.

17. The method of claim 16 , wherein the first passivation layer comprises glass.

18. The method of claim 16 , further comprising:

removing the sacrificial layer; and

forming a third passivation layer covering the conductive material.

19. The method of claim 16 , further comprising:

removing a portion of the conductive material above the sacrificial layer.

20. The method of claim 16 , further comprising:

forming a contact over the conductive material, wherein the contact is aligned with the conductive material in the recess.