IP Library Granted Patent US 12,081,784
Granted Patent B2
US 12,081,784 · App. 17/700,834 · Granted Sep 3, 2024

Support of mixed IRAP and non-IRAP pictures within an access unit in multi-layer video bitstreams

Inventor: Ye-Kui Wang (San Diego, CA)
Assignee: Huawei Technologies Co., Ltd.
H04N19/46H04N19/107H04N19/11H04N19/136H04N19/14H04N19/172H04N19/184H04N19/187H04N19/43H04N19/593
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Quick Facts
Patent No.
US 12,081,784
App. No.
17/700,834
Granted
Sep 3, 2024
Kind
B2
Abstract

A method of decoding implemented by a video decoder is provided. The method includes receiving a bitstream including a sequence parameter set (SPS) containing a first flag and an indicator of a length of a picture order count (POC) most significant bits (MSB) value when present in a header referring to the SPS, where a value of the first flag specifies that a second flag is present in the header referring to the SPS, and where a value of the second flag specifies that the POC MSB value is present in the header; determining a POC value based on the POC MSB value; identifying a picture from the bitstream based on the POC value; and decoding the picture to obtain a decoded picture.

Claims (34)

1. A method of decoding implemented by a video decoder, comprising:

receiving a bitstream including a sequence parameter set (SPS) and a header, wherein the SPS comprises a first flag and an indicator of a length of a picture order count (POC) most significant bits (MSB) value, wherein the header comprises a second flag and the POC MSB value, wherein a value of the first flag specifies that the second flag is present in the header, and wherein a value of the second flag specifies that the POC MSB value is present in the header;

determining a POC value based on the POC MSB value;

identifying a picture from the bitstream based on the POC value; and

decoding the picture to obtain a decoded picture.

2. The method of claim 1 , wherein the first flag comprises a POC MSB flag designated as sps_poc_msb_cycle_flag.

3. The method of claim 1 , wherein the value of the first flag is one.

4. The method of claim 1 , wherein the second flag comprises another POC MSB flag and is designated as ph_poc_msb_cycle_present_flag.

5. The method of claim 1 , wherein the value of the second flag is one.

6. The method of claim 1 , wherein the POC value is determined by concatenating the POC MSB value to a POC least significant bits (LSB) value.

7. The method of claim 1 , wherein the second flag is a picture-level flag.

8. The method of claim 1 , wherein the indicator of the length plus 1 specifies the length, in bits, of the POC MSB.

9. The method of claim 1 , further comprising displaying the picture as decoded on a display of an electronic device.

10. A method of encoding implemented by a video encoder, the method comprising:

setting a first flag in a sequence parameter set (SPS) to a value to specify that a second flag is present in a header;

providing in the SPS an indicator of a length of a picture order count (POC) most significant bits (MSB) value in the header;

setting the second flag in the header to a value to specify that the POC MSB value is present in the header;

encoding the SPS and the header into a bitstream; and

storing the bitstream for communication toward a video decoder.

11. The method of claim 10 , wherein the first flag comprises a POC MSB flag designated as sps_poc_msb_cycle_flag, and wherein the value of the first flag is one.

12. The method of claim 10 , wherein the second flag comprises another POC MSB flag and is designated as ph_poc_msb_cycle_present_flag, and wherein the value of the second flag is one.

13. The method of claim 10 , wherein the POC value is determined by adding the POC MSB value to a POC least significant bits (LSB) value, and wherein the second flag is a picture-level flag.

14. A decoding device, comprising:

a receiver configured to receive a bitstream including a sequence parameter set (SPS) comprising a first flag and an indicator of a length of a picture order count (POC) most significant bits (MSB) value when the POC MSB value is present in a header;

a memory coupled to the receiver, the memory storing instructions; and

one or more processors coupled to the memory, the one or more processors configured to execute the instructions to cause the decoding device to:

determine whether a second flag is present in the header related to the SPS based on a value of the first flag;

determine whether the POC MSB value is present in the header based on a value of the second flag when the second flag is present;

determine a POC value, based on the POC MSB value when the POC MSB value is present;

identify a picture from the bitstream based on the POC value; and

decode the picture to obtain a decoded picture.

15. The decoding device of claim 14 , wherein the first flag comprises a POC MSB flag designated as sps_poc_msb_cycle_flag.

16. The decoding device of claim 14 , wherein the second flag comprises another POC MSB flag and is designated as ph_poc_msb_cycle_present_flag.

17. The decoding device of claim 14 , wherein the second flag is a picture-level flag.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2024
From: FUTUREWEI TECHNOLOGIES, INC.
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 068217/0536 →
Continuity (2)
Continuation PCTUS2020050985 · Sep 16, 2020
Related Publication 20220217386A1 · Jul 7, 2022
Cited By (2)
US 12,652,408 US 12,701,254