IP Library › Granted Patent US 12,087,835
Granted Patent B2
US 12,087,835 · App. 18/217,147 · Granted Sep 10, 2024

Thin film transistor array substrate and electronic device including the same

Inventors: Dohyung Lee (Paju-si, KR); JuHeyuck Baeck (Paju-si, KR); ChanYong Jeong (Paju-si, KR)
Assignee: LG Display Co., Ltd.
H01L29/42376H01L27/14614H01L29/42384H01L29/435
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Quick Facts
Patent No.
US 12,087,835
App. No.
18/217,147
Granted
Sep 10, 2024
Kind
B2
Abstract

A thin film transistor array substrate and an electronic device including the thin film transistor array are disclosed. The thin film transistor comprises a substrate, a first active layer on the substrate, a gate electrode on the first active layer, a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer. The gate electrode is configured to drive the first active layer and the second active layer. Thereby, it is possible to provide the thin film transistor array substrate including one or more thin film transistors having high current characteristics in a small area, and the electronic device including the thin film transistor array substrate.

Claims (47)

1. A thin film transistor comprising:

a substrate;

a first active layer on the substrate;

a gate electrode on the first active layer; and

a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer,

wherein the gate electrode is configured to drive the first active layer and the second active layer,

wherein the first active layer includes a first channel region, a first region at a first side of the first channel region, a second region on a second side of the first channel region that is opposite the first side of the first channel region, a first auxiliary region between the first region and the first channel region of the first active layer, and a second auxiliary region disposed between the second region and the first channel region of the first active layer,

wherein an electrical resistance value of the first auxiliary region and an electrical resistance value of the second auxiliary region are greater than an electrical resistance value of the first region and an electrical resistance of the second region, and the electrical resistance value of the first auxiliary region and the electrical resistance value of the second auxiliary region are less than an electrical resistance value of the first channel region.

2. The thin film transistor of claim 1 ,

wherein the second active layer includes a second channel region, a third region at a first side of the second channel region, and a fourth region on a second side of the second channel region that is opposite the first side of the second channel region.

3. The thin film transistor of claim 2 , further comprising:

a gate insulating film between the gate electrode and the first active layer;

a first electrode electrically connected to the first region of the first active layer and the third region of the second active layer; and

a second electrode electrically connected to the second region of the first active layer and the fourth region of the second active layer.

4. The thin film transistor of claim 1 , wherein the gate electrode comprises:

a first sub-gate electrode on the first active layer; and

a second sub-gate electrode on the first sub-gate electrode.

5. A thin film transistor comprising:

a substrate;

a first active layer on the substrate;

a gate electrode on the first active layer; and

a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer,

wherein the gate electrode is configured to drive the first active layer and the second active layer,

wherein the second active layer includes a second channel region, a third region at a first side of the second channel region, a fourth region on a second side of the second channel region that is opposite the first side of the second channel region, a third auxiliary region between the third region and the second channel region of the second active layer, and a fourth auxiliary region disposed between the fourth region and the second channel region of the second active layer, and

wherein an electrical resistance value of the third auxiliary region and an electrical resistance value of the fourth auxiliary region are greater than an electrical resistance value of the third region and an electrical resistance of the fourth region, and the electrical resistance value of the third auxiliary region and the electrical resistance value of the fourth auxiliary region are less than an electrical resistance value of the second channel region.

6. A thin film transistor comprising:

a substrate;

a first active layer on the substrate;

a gate electrode on the first active layer; and

a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer,

wherein the gate electrode is configured to drive the first active layer and the second active layer,

wherein the second active layer comprises:

a first oxide active layer; and

a second oxide active layer on the first oxide active layer.

7. A thin film transistor comprising:

a substrate;

a first active layer on the substrate;

a gate electrode on the first active layer; and

a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer,

wherein the gate electrode is configured to drive the first active layer and the second active layer,

wherein the first active layer includes a first channel region, a first region at a first side of the first channel region, and a second region on a second side of the first channel region that is opposite the first side of the first channel region,

wherein the second active layer includes a second channel region, a third region at a first side of the second channel region, and a fourth region on a second side of the second channel region that is opposite the first side of the second channel region,

wherein the thin film transistor further comprising:

a first electrode electrically connected to the first region of the first active layer and the third region of the second active layer; and

a second electrode electrically connected to the third region of the first active layer and the fourth region of the second active layer,

wherein the first electrode comprises a first conductive layer on the third region of the second active layer, and a second conductive layer on the first conductive layer, and

wherein the second electrode comprises a third conductive layer on the fourth region of the second active layer, and a fourth conductive layer on the third conductive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2023
From: LEE, DOHYUNG; BAECK, JUHEYUCK; JEONG, CHANYONG
To: LG DISPLAY CO., LTD.
Reel/Frame 065013/0722 →
Priority Claims (1)
KR 10-2020-0135818 · Oct 20, 2020 · national
Continuity (2)
Division 17505115 · Oct 19, 2021
Related Publication 20230361189A1 · Nov 9, 2023