IP Library › Granted Patent US 12,093,489
Granted Patent B2
US 12,093,489 · App. 17/730,549 · Granted Sep 17, 2024

Sensor device and driving method thereof

Inventors: Hyung Gun Ma (Yongin-si, KR); Moon Jae Jeong (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
G06F3/044G06F3/04182H03F3/68H03F3/70H03M1/12G06F1/04G09G3/3275
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Quick Facts
Patent No.
US 12,093,489
App. No.
17/730,549
Granted
Sep 17, 2024
Kind
B2
Abstract

A sensor device includes: first sensors; second sensors generating a mutual capacitance with the first sensors; a sensor transmitter connected to the first sensors, the sensor transmitter supplying driving signals to the first sensors; and a sensor receiver connected to the second sensors. The sensor receiver receives sensing signals from the second sensors. The sensor receiver includes a band pass filter including a plurality of paths connected in parallel. A first path among the plurality of paths sequentially includes an input mixer, a filter, and an output mixer.

Claims (53)

1. A sensor device comprising:

a plurality of first sensors;

a plurality of second sensors generating a mutual capacitance with the plurality of first sensors;

a sensor transmitter connected to the plurality of first sensors, the sensor transmitter supplying driving signals to the plurality of first sensors; and

a sensor receiver connected to the plurality of second sensors, the sensor receiver receiving sensing signals from the second sensors,

wherein the sensor receiver includes a band pass filter including a plurality of paths connected in parallel, and wherein a first path among the plurality of paths sequentially includes a first input mixer, a first filter, and a first output mixer,

wherein a frequency and a phase of a first input clock signal received by the first input mixer are equal to a frequency and a phase of a first output clock signal received by the first output mixer.

2. The sensor device of claim 1 , wherein a central frequency of a passband of the first filter is set as a difference or a sum of the frequency of the input clock signal and a frequency of the driving signals.

3. The sensor device of claim 2 , wherein the frequency of the first input clock signal is equal to the frequency of the driving signals.

4. The sensor device of claim 2 , wherein the frequency of the first input clock signal is different from the frequency of the driving signals.

5. A sensor device comprising:

a plurality of first sensors;

a plurality of second sensors generating a mutual capacitance with the plurality of first sensors;

a sensor transmitter connected to the plurality of first sensors, the sensor transmitter supplying driving signals to the plurality of first sensors; and

a sensor receiver connected to the plurality of second sensors, the sensor receiver receiving sensing signals from the second sensors,

wherein the sensor receiver includes a band pass filter including a plurality of paths connected in parallel, and wherein a first path among the plurality of paths sequentially includes a first input mixer, a first filter, and a first output mixer,

wherein a second path among the plurality of paths sequentially includes a second input mixer, a second filter, and a second output mixer, and

wherein a phase of a first input clock signal received by the first input mixer is different from a phase of a second input clock signal received by the second input mixer.

6. The sensor device of claim 5 , wherein a frequency of the first input clock signal is equal to a frequency of the second input clock signal.

7. A sensor device comprising:

a plurality of first sensors;

a plurality of second sensors generating a mutual capacitance with the plurality of first sensors;

a sensor transmitter connected to the plurality of first sensors, the sensor transmitter supplying driving signals to the plurality of first sensors; and

a sensor receiver connected to the plurality of second sensors, the sensor receiver receiving sensing signals from the second sensors,

wherein the sensor receiver includes a band pass filter including a plurality of paths connected in parallel, and wherein a first path among the plurality of paths sequentially includes a first input mixer, a first filter, and a first output mixer,

wherein the sensor receiver further includes a charge amplifier configured to receive the sensing signals from two sensors among the second sensors, and wherein the band pass filter is connected to an output terminal of the charge amplifier.

8. The sensor device of claim 7 , wherein the sensor receiver further includes:

a mixer configured to mix an output signal of the band pass filter and a local clock signal;

a low pass filter configured to filter an output signal of the mixer to have a set frequency band; and

an analog-to-digital converter configured to convert an output signal of the low pass filter into a digital signal.

9. The sensor device of claim 7 , wherein the sensor receiver further comprises:

a first demodulator configured to demodulate an output signal of the band pass filter, based on a first demodulation clock signal; and

a second demodulator configured to demodulate the output signal of the band pass filter, based on a second demodulation clock signal having a phase different by 90 degrees from a phase of the first demodulation clock signal.

10. The sensor device of claim 9 , wherein the sensor receiver further comprises:

a first low pass filter configured to filter an output signal of the first demodulator to have a set frequency band; and

a second low pass filter configured to filter an output signal of the second demodulator to have a set frequency band.

11. The sensor device of claim 10 , wherein the set frequency bands of the first low pass filter and the second low pass filter is lower than a set frequency band of the band pass filter.

12. The sensor device of claim 11 , wherein the sensor receiver further comprises a first analog-to-digital converter configured to convert an output signal of the first low pass filter into a first digital signal; and a second analog-to-digital converter configured to convert an output signal of the second low pass filter into a second digital signal.

13. The sensor device of claim 12 , wherein the sensor receiver further comprises a signal processor configured to determine a final sensing value by adding a square value of the first digital signal and a square value of the second digital signal.

14. The sensor device of claim 9 , wherein the sensor receiver further comprises:

a first band pass filter configured to filter an output signal of the first demodulator to have a set frequency band; and

a second band pass filter configured to filter an output signal of the second modulator to have a set frequency band.

15. The sensor device of claim 14 , wherein the set frequency bands of the first band pass filter and the second band pass filter are lower than a set frequency band of the band pass filter, and have central frequencies greater than 0 Hz.

16. The sensor device of claim 15 , wherein the sensor receiver further comprises:

a first analog-to-digital converter configured to convert an output signal of the first band pass filter into a first digital signal; and

a second analog-to-digital converter configured to convert an output signal of the second band pass filter into a second digital signal.

17. The sensor device of claim 16 , wherein the sensor receiver further includes a signal processor configured to determine a final sensing value by adding a square value of the first digital signal and a square value of the second digital signal.

18. A method of driving a sensor device, the method comprising:

supplying driving signals to a plurality of first sensors;

receiving sensing signals from two adjacent second sensors generating a mutual capacitance with the first sensors;

amplifying a difference of the sensing signals to generate an amplified signal; and

filtering the amplified signal by passing the amplified signal through a plurality of paths connected in parallel, wherein a path among the plurality of paths sequentially includes an input mixer, a filter, and an output mixer,

wherein a frequency and a phase of a first input clock signal received by the first input mixer are equal to a frequency and a phase of a first output clock signal received by the first output mixer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2022
From: MA, HYUNG GUN; JEONG, MOON JAE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 059742/0022 →
Priority Claims (1)
KR 10-2021-0139705 · Oct 19, 2021 · national
Continuity (1)
Related Publication 20230117808A1 · Apr 20, 2023