Word line pump device of dynamic random access memory chip and clamp circuit thereof
A word line pump device of a dynamic random access memory (DRAM) chip and a clamp circuit thereof are provided. The DRAM chip receives a first voltage and a second voltage from outside, and the first voltage is smaller than the second voltage. The clamp circuit clamps a word line voltage to the second voltage in response to the word line pump device not receiving a power supply voltage.
1. A word line pump device of a dynamic random access memory chip, adapted to provide a word line voltage to a word line of the dynamic random access memory chip, wherein the dynamic random access memory chip receives a first voltage and a second voltage from outside, the first voltage is smaller than the second voltage, and the word line pump device comprises:
a power detecting circuit, detecting whether the word line pump device receives a power supply voltage and outputting a power-on indication signal correspondingly;
a clamp circuit, coupled to the power detecting circuit and clamping the word line voltage to the second voltage according to the power-on indication signal in response to the word line pump device not receiving the power supply voltage;
an oscillator circuit, coupled to the power detecting circuit and providing a clock signal according to the power-on indication signal in response to the word line pump device receiving the power supply voltage; and
a pump circuit, coupled to the oscillator circuit and boosting the word line voltage to a target word line driving voltage according to the clock signal.
2. The word line pump device according to claim 1 , wherein the clamp circuit comprises:
a first transistor, coupled between the second voltage and an output end of the word line pump device, wherein a gate end of the first transistor is coupled to the power detecting circuit, turned on by the power-on indication signal in response to the word line pump device not receiving the power supply voltage, and disconnected in response to the word line pump device receiving the power supply voltage.
3. The word line pump device according to claim 2 , further comprising:
an inverter with an input end coupled to the power detecting circuit; and
a second transistor, coupled between the gate end of the first transistor and a reference voltage, turned on in response to the word line pump device not receiving the power supply voltage to pull down a voltage of the gate end of the first transistor, and disconnected in response to the word line pump device receiving the power supply voltage.
4. The word line pump device according to claim 3 , wherein the reference voltage is a grounding voltage.
5. The word line pump device according to claim 3 , wherein the first transistor is a p-type transistor and the second transistor is an n-type transistor.
6. The word line pump device according to claim 1 , wherein the first voltage is the power supply voltage and the second voltage is an activating voltage of the dynamic random access memory chip.
7. A clamp circuit of a word line pump device, suitable for a dynamic random access memory chip, wherein the dynamic random access memory chip receives a first voltage and a second voltage from outside, the first voltage is smaller than the second voltage, and the clamp circuit comprises:
an inverter with an input end receiving a power-on indication signal, wherein the power-on indication signal indicates whether the word line pump device receives a power supply voltage;
a first transistor, coupled between the second voltage and an output end of the word line pump device, wherein a gate end of the first transistor is configured to receive the power-on indication signal and is turned on in response to the word line pump device not receiving the power supply voltage and disconnected in response to the word line pump device receiving the power supply voltage; and
a second transistor, coupled between the gate end of the first transistor and a reference voltage, turned on in response to the word line pump device not receiving the power supply voltage to pull down a voltage of the gate end of the first transistor, and disconnected in response to the word line pump device receiving the power supply voltage.
8. The clamp circuit of the word line pump device according to claim 7 , wherein the reference voltage is a grounding voltage.
9. The clamp circuit of the word line pump device according to claim 7 , wherein the first transistor is a p-type transistor and the second transistor is an n-type transistor.
10. The clamp circuit of the word line pump device according to claim 7 , wherein the first voltage is the power supply voltage and the second voltage is an activating voltage of the dynamic random access memory chip.