Automatic attenuation of analog-digital-converter (ADC) input signal based on error vector magnitude (EVM) performance
A radio frequency (RF) test device such as a spectrum analyzer may include an RF attenuator to attenuate a received RF signal; a mixer to down-convert the attenuated RF signal; an IF attenuator to attenuate the down-converted signal; an analog-to-digital converter (ADC) to digitize the attenuated, down-converted signal; and a processor, which may select attenuation values for one or more of the RF attenuator and the IF attenuator based on an error magnitude vector (EVM) analysis, an RF signal type, and/or a signal level at an input of the ADC. The processor may use a look-up table for the selection. Initial attenuation values may be selected based on an expected RF signal type, RF signal frequency, and/or RF signal bandwidth. The attenuation values may also be selected in an iterative manner stepping the attenuation values up or down.
1. An input and digitization subsystem for a radio frequency (RF) test device, comprising:
an RF attenuator to attenuate a received RF signal;
a mixer to down-convert the attenuated RF signal from the RF attenuator;
an intermediate frequency (IF) attenuator to attenuate the down-converted signal from the mixer;
an analog-to-digital converter (ADC) to digitize the attenuated, down-converted signal from the IF attenuator; and
a processor to select attenuation values for one or more of the RF attenuator and the IF attenuator based on one or more of an error magnitude vector (EVM) analysis, an RF signal type, or a signal level at an input of the ADC, and
wherein the EVM analysis comprises analysis of one or more characteristics of the RF test device.
2. The input and digitization subsystem of claim 1 , wherein initial attenuation values for one or more of the RF attenuator and the IF attenuator are selected based on one or more of an expected RF signal type, RF signal frequency, or RF signal bandwidth.
3. The input and digitization subsystem of claim 1 , wherein the attenuation values for one or more of the RF attenuator and the IF attenuator are selected in an iterative manner stepping the attenuation values for the RF attenuator and the IF attenuator up or down.
4. The input and digitization subsystem of claim 1 , wherein the EVM analysis comprises analysis of one or more of a resolution, a signal-to-noise-and-distortion ratio (SINAD), an effective number of bits (ENOB), a signal-to-noise ratio (SNR), a total harmonic distortion (THD), a total harmonic distortion plus noise (THD+N), or a spurious free dynamic range (SFDR) of the ADC.
5. The input and digitization subsystem of claim 1 , further comprising:
a field programmable gate array (FPGA), comprising digital processing circuitry, to process the digitized signal from the ADC and send the processed digitized signal to operational circuits for displaying or storing the processed digitized signal.
6. The input and digitization subsystem of claim 1 , wherein the processor is to select the attenuation values for both the RF attenuator and the IF attenuator.
7. The input and digitization subsystem of claim 1 , wherein the attenuation values for one or more of the RF attenuator and the IF attenuator are selected from a look-up table.
8. A test device to analyze radio frequency (RF) signals, comprising:
an input and digitization subsystem comprising:
an RF attenuator to attenuate a received RF signal;
a mixer to down-convert the attenuated RF signal from the RF attenuator;
an intermediate frequency (IF) attenuator to attenuate the down-converted signal from the mixer; and
an analog-to-digital converter (ADC) to digitize the attenuated, down-converted signal from the IF attenuator;
a field programmable gate array (FPGA) to receive and process the digitized signal from the ADC; and
a processor to manage operation of one or more of the RF attenuator, the IF attenuator, the ADC, and the FPGA,
wherein the processor is to select attenuation values for one or more of the RF attenuator and the IF attenuator based on one or more of an error magnitude vector (EVM) analysis, an RF signal type, or a signal level at an input of the ADC, and
wherein the EVM analysis comprises analysis of one or more characteristics of the RF test device.
9. The test device of claim 8 , further comprising at least one of an EVM analysis subsystem, a display subsystem, an analysis subsystem, a fast Fourier transform (FFT) subsystem, or a storage subsystem.
10. The test device of claim 8 , wherein the processor is to select
initial attenuation values for one or more of the RF attenuator and the IF attenuator based on one or more of an expected RF signal type, RF signal frequency, or RF signal bandwidth, and
the attenuation values for one or more of the RF attenuator and the IF attenuator in an iterative manner stepping the attenuation values for the RF attenuator and the IF attenuator up or down.
11. The test device of claim 8 , wherein the processor is to select the attenuation values for one or more of the RF attenuator and the IF attenuator from a look-up table.
12. The test device of claim 8 , wherein the EVM analysis comprises analysis of one or more of a resolution, a signal-to-noise-and-distortion ratio (SINAD), an effective number of bits (ENOB), a signal-to-noise ratio (SNR), a total harmonic distortion (THD), a total harmonic distortion plus noise (THD+N), or a spurious free dynamic range (SFDR) of the ADC.
13. The test device of claim 8 , wherein the FPGA comprises one or more digital processing circuitry to receive and process the digitized signal.
14. The test device of claim 8 , further comprising:
one or more operational subsystems to perform analytical operations on the digitized signal.
15. The test device of claim 8 , wherein the test device is a spectrum analyzer.
16. A method, comprising:
receiving a radio frequency (RF) signal at an input of an RE test device;
attenuating, by an RF attenuator of the RF test device, the received RF signal;
down-converting, by a mixer of the RF test device, the attenuated RF signal from the RF attenuator;
attenuating, by an intermediate frequency (IF) attenuator of the RF test device, the down-converted signal from the mixer;
digitizing, by an analog-to-digital converter (ADC) of the RF test device, the attenuated, down-converted signal from the IF attenuator; and
selecting, by a processor of the RF test device, attenuation values for one or more of the RF attenuator and the IF attenuator based on one or more of an error magnitude vector (EVM) analysis, an RF signal type, or a signal level at an input of the ADC,
wherein the EVM analysis comprises analysis of one or more characteristics of the RF test device.
17. The method of claim 16 , further comprising:
selecting the attenuation values for one or more of the RF attenuator and the IF attenuator from a look-up table.
18. The method of claim 16 , further comprising:
selecting initial attenuation values for one or more of the RF attenuator and the IF attenuator based on one or more of an expected RF signal type, RF signal frequency, or RF signal bandwidth.
19. The method of claim 16 , further comprising:
selecting the attenuation values for one or more of the RF attenuator and the IF attenuator in an iterative manner by stepping the attenuation values for the RF attenuator and the IF attenuator up or down.
20. The method of claim 16 , further comprising:
performing, by the processor, the EVM analysis based on one or more of a resolution, a signal-to-noise-and-distortion ratio (SINAD), an effective number of bits (ENOB), a signal-to-noise ratio (SNR), a total harmonic distortion (THD), a total harmonic distortion plus noise (THD+N), or a spurious free dynamic range (SFDR) of the ADC.