IP Library › Granted Patent US 12,101,967
Granted Patent B2
US 12,101,967 · App. 17/471,849 · Granted Sep 24, 2024

Display device

Inventors: Keunwoo Kim (Seongnam-si, KR); Meejae Kang (Suwon-si, KR); Thanh Tien Nguyen (Hwaseong-si, KR); Hyena Kwak (Hwaseong-si, KR); Jaehwan Chu (Hwaseong-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/1216H10K59/124H10K59/131
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Quick Facts
Patent No.
US 12,101,967
App. No.
17/471,849
Granted
Sep 24, 2024
Kind
B2
Abstract

A display device may include a substrate, a first transistor disposed on the substrate and including a first gate electrode, a first conductive pattern disposed on the first gate electrode such that the first conductive pattern and the first gate electrode constitute a first capacitor, a second conductive pattern disposed on the first capacitor, a third conductive pattern disposed on the second conductive pattern such that the third conductive pattern and the second conductive pattern constitute a second capacitor, and a light emitting structure disposed on the second capacitor.

Claims (66)

1. A display device comprising:

a substrate;

a first transistor disposed on the substrate and including a first gate electrode;

a first conductive pattern disposed on the first gate electrode such that the first conductive pattern and the first gate electrode constitute a first capacitor;

a second conductive pattern disposed on the first conductive pattern of the first capacitor;

a third conductive pattern disposed on the second conductive pattern such that the third conductive pattern and the second conductive pattern constitute a second capacitor; and

a light emitting structure disposed on the second capacitor.

2. The display device of claim 1 , further comprising:

a first insulating layer disposed between the first gate electrode and the first conductive pattern; and

a second insulating layer disposed between the second conductive pattern and the third conductive pattern.

3. The display device of claim 2 , wherein a permittivity of the first insulating layer and a permittivity of the second insulating layer are different from each other.

4. The display device of claim 2 , wherein a thickness of the first insulating layer and a thickness of the second insulating layer are different from each other.

5. The display device of claim 1 , wherein the first transistor further includes:

a first active layer;

a first gate insulating layer disposed between the first active layer and the first gate electrode; and

a first electrode disposed on the first gate insulating layer and connected to the first active layer through a contact hole defined in the first gate insulating layer, and

wherein the second conductive pattern is electrically connected to the first electrode.

6. The display device of claim 1 , further comprising:

a second transistor disposed on the first transistor.

7. The display device of claim 6 , wherein the second transistor further includes:

a first active layer;

a first gate insulating layer disposed on the first active layer;

a second gate electrode disposed on the first gate insulating layer; and

a first electrode disposed on the second gate electrode and connected to a first portion of the first active layer through a first contact hole defined in the first gate insulating layer, and

wherein the third conductive pattern is electrically connected to the first electrode.

8. The display device of claim 7 , further comprising:

a data line disposed in a same layer as the first electrode,

wherein the data line is connected to a second portion of the first active layer through a second contact hole defined in the first gate insulating layer.

9. The display device of claim 7 , further comprising:

a power line disposed in a same layer as the first electrode,

wherein the power line is connected to the first conductive pattern through a second contact hole defined in the first gate insulating layer.

10. The display device of claim 7 , wherein the light emitting structure includes:

a lower electrode;

an emission layer disposed on the lower electrode; and

an upper electrode disposed on the emission layer.

11. The display device of claim 10 , further comprising:

a via layer disposed on the first electrode,

wherein the lower electrode is electrically connected to the first electrode through a contact hole defined in the via layer.

12. A display device comprising:

a substrate including a display area and a peripheral area surrounding the display area;

a first buffer transistor disposed in the peripheral area on the substrate and including a first gate electrode;

a first conductive pattern disposed on the first gate electrode such that the first conductive pattern and the first gate electrode constitute a first capacitor;

a second buffer transistor disposed on the first capacitor and including a second gate electrode;

a second conductive pattern disposed on the second gate electrode such that the second conductive pattern and the second gate electrode constitute a second capacitor; and

a light emitting structure disposed in the display area on the substrate.

13. The display device of claim 12 , further comprising:

a first insulating layer disposed between the first gate electrode and the first conductive pattern; and

a second insulating layer disposed between the second gate electrode and the second conductive pattern.

14. The display device of claim 13 , wherein a permittivity of the first insulating layer and a permittivity of the second insulating layer are different from each other.

15. The display device of claim 13 , wherein a thickness of the first insulating layer and a thickness of the second insulating layer are different from each other.

16. The display device of claim 12 , wherein the first buffer transistor further includes:

a first active layer; and

a first gate insulating layer disposed between the first active layer and the first gate electrode.

17. The display device of claim 12 , wherein the second buffer transistor further includes:

a first active layer;

a first gate insulating layer disposed on the first active layer;

a first electrode disposed on the second conductive pattern and connected to the first active layer though a first contact hole defined in the first gate insulating layer, and

wherein the second conductive pattern is electrically connected to the first electrode.

18. The display device of claim 17 , further comprising:

a second electrode disposed in a same layer as the first electrode,

wherein the first buffer transistor further includes a second active layer; and

the second electrode is connected to the second active layer through a second contact hole defined in the first gate insulating layer.

19. The display device of claim 12 , wherein the light emitting structure includes:

a lower electrode;

an emission layer disposed on the lower electrode; and

an upper electrode disposed on the emission layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2023
From: KIM, KEUNWOO; KANG, MEEJAE; NGUYEN, THANH TIEN; KWAK, HYENA; CHU, JAEHWAN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 063241/0195 →
Priority Claims (1)
KR 10-2020-0170635 · Dec 8, 2020 · national
Continuity (1)
Related Publication 20220181420A1 · Jun 9, 2022