IP Library Granted Patent US 12,101,976
Granted Patent B2
US 12,101,976 · App. 17/685,773 · Granted Sep 24, 2024

Electronic device

Inventors: Junhyun Park (Suwon-si, KR); Jangmi Kang (Seoul, KR); Minjae Jeong (Hwaseong-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/131H10K59/126
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Quick Facts
Patent No.
US 12,101,976
App. No.
17/685,773
Granted
Sep 24, 2024
Kind
B2
Abstract

An electronic device includes a display panel including a plurality of pixels. Each of the plurality of pixels includes a light-emitting diode, a power line, an initialization voltage line, an initialization signal line, a bias voltage line, a transistor including a first gate in contact with the initialization signal line through a first contact and electrically connected between the initialization voltage line and the anode, and a transistor including a second gate in contact with the initialization signal line through a second contact and electrically connected between the power line and the bias voltage line. In a plan view, the initialization signal line does not overlap the power line.

Claims (50)

1. An electronic device comprising a display panel including a plurality of pixels, each of the plurality of pixels including:

a light-emitting diode including an anode;

a power line which receives a power voltage;

an initialization voltage line which receives an initialization voltage;

an initialization signal line which receives an initialization signal;

a bias voltage line which receives a bias voltage;

a first transistor electrically connected between the power line and the anode of the light-emitting diode;

a second transistor electrically connected between a data line and a first reference node;

a third transistor including a first gate in contact with the initialization signal line through a first contact and electrically connected between the initialization voltage line and the anode; and

a fourth transistor including a second gate in contact with the initialization signal line through a second contact different from the first contact and electrically connected between the power line and the bias voltage line,

wherein in a plan view, the initialization signal line does not overlap the power line.

2. The electronic device of claim 1 , wherein the initialization signal line is extended in a first direction, and the power line is extended in a second direction crossing the first direction.

3. The electronic device of claim 2 , wherein the initialization voltage line is extended in the first direction.

4. The electronic device of claim 3 , wherein a width of the initialization voltage line along the second direction is larger than a width of the bias voltage line along the second direction.

5. The electronic device of claim 2 , wherein in the plan view, the first contact and the second contact are spaced apart from each other in the first direction.

6. The electronic device of claim 1 , wherein a width of the initialization signal line along a direction perpendicular to a main extension direction of the initialization signal line is larger than a width of the bias voltage line along the direction perpendicular to the main extension direction of the initialization signal line.

7. The electronic device of claim 1 , wherein the first gate and the second gate are integrated, and the second gate is extended in a main extension direction of the initialization signal line from the first gate.

8. The electronic device of claim 1 , wherein the power line comprises a first power line portion overlapping the first gate and the second gate in the plan view and a second power line portion non-overlapping the first gate and the second gate, and a first width of the first power line portion along a direction perpendicular to a main extension direction of the power line is smaller than a second width of the second power line portion along the direction perpendicular to the main extension direction of the power line.

9. The electronic device of claim 1 , wherein in the plan view, at least one of the first gate and the second gate overlaps the power line.

10. The electronic device of claim 1 , wherein the initialization signal line comprises a first initialization signal line and a second initialization signal line spaced apart in a main extension direction of the initialization signal line from the first initialization signal line, wherein:

the first initialization signal line contacts the first gate through the first contact; and

the second initialization signal line contacts the second gate through the second contact.

11. The electronic device of claim 10 , wherein the first initialization signal line and the second initialization signal line are electrically connected through the first gate and the second gate.

12. The electronic device of claim 1 , wherein the third transistor and the fourth transistor are turned on in response to the initialization signal.

13. The electronic device of claim 1 , further comprising:

a fifth transistor electrically connected between the first transistor and a second reference node;

a sixth transistor electrically connected between the initialization voltage line and the second reference node;

a seventh transistor electrically connected between a reference power line to which a reference voltage is applied and the first reference node;

an eighth transistor electrically connected between the first transistor and the anode; and

a ninth transistor electrically connected between the power line and the fourth transistor.

14. An electronic device comprising a display panel including a plurality of pixels, each of the plurality of pixels including:

a light-emitting diode including an anode;

a power line which receives a power voltage;

an initialization signal line which receives an initialization signal and includes:

a first line portion overlapping the power line in a plan view; and

a second line portion non-overlapping the power line in the plan view;

an initialization voltage line which receives an initialization voltage;

a bias voltage line which receives a bias voltage;

a first transistor electrically connected between the power line and the anode of the light-emitting diode;

a second transistor electrically connected between a data line and a first reference node;

a third transistor including a first gate in contact with the initialization signal line through a first contact and electrically connected between the initialization voltage line and the anode; and

a fourth transistor including a second gate in contact with the initialization signal line through a second contact different from the first contact and electrically connected between the power line and the bias voltage line,

wherein:

a first width of the first line portion along a direction perpendicular to a main extension direction of the initialization signal line is smaller than a second width of the second line portion along the direction perpendicular to the main extension direction of the initialization signal line.

15. The electronic device of claim 14 , wherein a width of the bias voltage line along the direction perpendicular to the main extension direction of the initialization signal line is larger than the first width but smaller than the second width.

16. The electronic device of claim 14 , wherein the initialization signal line is extended in a first direction, and the power line is extended in a second direction crossing the first direction.

17. The electronic device of claim 14 , wherein the power line comprises a first power line portion overlapping the initialization signal line and a second power line portion non-overlapping the initialization signal line, and a first width of the first power line portion along a direction perpendicular to a main extension direction of the power line is smaller than a second width of the second power line portion along the direction perpendicular to the main extension direction of the power line.

18. The electronic device of claim 14 , wherein the first gate and the second gate are integrated, and the second gate is extended in the main extension direction of the initialization signal line from the first gate.

19. The electronic device of claim 14 , wherein in the plan view, at least one of the first gate and the second gate overlaps the power line.

20. The electronic device of claim 14 , wherein the third transistor and the fourth transistor are turned on in response to the initialization signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2023
From: PARK, JUNHYUN; KANG, JANGMI; JEONG, MINJAE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 063519/0532 →
Priority Claims (1)
KR 10-2021-0054720 · Apr 28, 2021 · national
Continuity (1)
Related Publication 20220352291A1 · Nov 3, 2022