IP Library › Granted Patent US 12,105,860
Granted Patent B2
US 12,105,860 · App. 17/877,953 · Granted Oct 1, 2024

Flash programming randomization

Inventor: Uri Kaluzhny (Beit Shemesh, IL)
Assignee: WINBOND ELECTRONICS CORPORATION
G06F21/79G06F17/16G06F21/54
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Quick Facts
Patent No.
US 12,105,860
App. No.
17/877,953
Granted
Oct 1, 2024
Kind
B2
Abstract

A memory device includes a non-volatile memory (NVM) and a secure-programming circuit (SPC). The SPC is configured to receive a program-NVM instruction to program a given data word in a given location of the NVM, and, responsively to receiving the program-NVM instruction, to program bits of the given data word in the NVM in a random order.

Claims (18)

1. A memory device, comprising:

a non-volatile memory (NVM); and

a secure-programming circuit (SPC) configured to:

receive a program-NVM instruction to program a given data word to an NVM word at a specified address of the NVM, the data word consisting of two to the power of N bits;

generate a random permutation of two to the power of N values; and

responsively to receiving the program-NVM instruction, program bits of the given data word sequentially, bit-by-bit, to the NVM word at the specified address of the NVM, while (i) preserving bit positions of the programmed bits in the NVM word as in the given data word, but (ii) setting a temporal order that determines which bit to program before which other bit, in an order that follows the random permutation.

2. The memory device according to claim 1 , wherein the SPC is configured to generate the random permutation by:

multiplying an invertible binary matrix by a vector comprising respective bits of a count, to produce a product; and

adding a vector of random bits to the product.

3. The memory device according to claim 2 , wherein the invertible matrix is a triangular binary matrix comprising a main diagonal, a first triangle and a second triangle, wherein the main diagonal comprises “1” values, the first triangle comprises “0” values and the second triangle comprises random bits.

4. A method for secure programming of a non-volatile memory (NVM), the method comprising:

receiving a program-NVM instruction to program a given data word to an NVM word at a specified address of the NVM;

generating a random permutation of two to the power of N values; and

responsively to receiving the program-NVM instruction, programming bits of the given data word sequentially, bit-by-bit, to the NVM word at the specified address of the NVM, while (i) preserving bit positions of the programmed bits in the NVM word as in the given data word, but (ii) setting a temporal order that determines which bit to program before which other bit, in accordance with an order that follows the random permutation.

5. The method according to claim 4 , wherein generating the random permutation comprises:

multiplying an invertible binary matrix by a vector comprising respective bits of a count, to produce a product; and

adding a vector of random bits to the product.

6. The method according to claim 5 , wherein the invertible matrix is a triangular binary matrix comprising a main diagonal, a first triangle and a second triangle, wherein the main diagonal comprises “1” values, the first triangle comprises “0” values and the second triangle comprises random bits.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2022
From: KALUZHNY, URI
To: WINBOND ELECTRONICS CORPORATION
Reel/Frame 060678/0662 →
Continuity (1)
Related Publication 20240037285A1 · Feb 1, 2024