IP Library Granted Patent US 12,105,960
Granted Patent B2
US 12,105,960 · App. 17/900,808 · Granted Oct 1, 2024

Self-synchronizing remote memory operations in a multiprocessor system

Inventors: Srinivas Santosh Kumar Madugula (Visakhapatnam, IN); Olivier Giroux (Santa Clara, CA); Wishwesh Anil Gandhi (Sunnyvale, CA); Michael Allen Parker (San Jose, CA); Raghuram L (Bangalore, IN); Ivan Tanasic (San Francisco, CA); Manan Patel (San Jose, CA); Mark Hummel (Franklin, MA); Alexander L. Minkin (Los Altos, CA)
Assignee: NVIDIA CORPORATION
G06F3/0611G06F3/0659G06F3/0673
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Quick Facts
Patent No.
US 12,105,960
App. No.
17/900,808
Granted
Oct 1, 2024
Kind
B2
Abstract

Various embodiments include techniques for performing self-synchronizing remote memory operations in a multiprocessor computing system. During a remote memory operation in the multiprocessor computing system, a source processing unit transmits multiple segments of data to a destination processing. For each segment of data, the source processing unit transmits a remote memory operation to the destination processing unit that includes associated metadata that identifies the memory location of a corresponding synchronization object. The remote memory operation along with the metadata is transmitted as a single unit to the destination processing unit. The destination processing unit splits the operation into the remote memory operation and the memory synchronization operation. As a result, the source processing unit avoids the need to perform a separate memory synchronization operation, thereby reducing inter-processor communications and increasing performance of remote memory operations.

Claims (68)

1. A computer-implemented method for performing remote memory operations, the method comprising:

generating a first self-synchronizing memory store operation that includes a first memory store operation and a first synchronization operation that includes metadata associated with a first location of a first synchronization object stored in a memory system;

transmitting the first self-synchronizing memory store operation to the memory system;

determining that the first self-synchronizing memory store operation has arrived at a point of consistency in a remote computing system;

dividing, at the point of consistency, the first self-synchronizing memory store operation into the first memory store operation and the first synchronization operation;

storing data included in the first memory store operation at a first location in the memory system; and

updating the first synchronization object based on the first synchronization operation.

2. The computer-implemented method of claim 1 , wherein the first synchronization object comprises a binary flag, and wherein updating the first synchronization object comprises setting the binary flag.

3. The computer-implemented method of claim 1 , wherein the first synchronization object comprises a count of the remote memory operations, and wherein updating the first synchronization object comprises incrementing the count.

4. The computer-implemented method of claim 1 , wherein the first synchronization object comprises a count of a number of bytes transferred by the remote memory operations, and wherein updating the first synchronization object comprises adding a number of bytes included in the first memory store operation to the count.

5. The computer-implemented method of claim 4 , further comprising:

determining that a second self-synchronizing memory store operation has been demoted to a non-self-synchronizing memory store operation; and

adding a number of bytes included in the non-self-synchronizing memory store operation to the count.

6. The computer-implemented method of claim 1 , further comprising:

generating a second self-synchronizing memory store operation that includes a second memory store operation and a second synchronization operation that includes metadata associated with a third location of a second synchronization object stored in the memory system;

transmitting the second self-synchronizing memory store operation to the memory system;

determining the second synchronization operation cannot be processed;

demoting the second self-synchronizing memory store operation to the second memory store operation; and

storing data included in the second memory store operation at the third location in the memory system.

7. The computer-implemented method of claim 6 , wherein determining that the second synchronization operation cannot be processed comprises:

determining that the third location in the memory system resides in a first virtual memory page; and

determining that the second synchronization object resides in a second virtual memory page.

8. The computer-implemented method of claim 1 , further comprising:

determining that a second self-synchronizing memory store operation has arrived at the point of consistency in the remote computing system; and

determining that the first synchronization operation can be merged with a second synchronization operation included in the second self-synchronizing memory store operation,

wherein the first synchronization object is updated based on the first synchronization operation and the second synchronization operation.

9. The computer-implemented method of claim 8 , wherein determining that the first synchronization operation can be merged with the second synchronization operation comprises determining that the first synchronization operation and the second synchronization operation arrived at the point of consistency within a threshold duration of time of one another.

10. The computer-implemented method of claim 8 , wherein determining that the first synchronization operation can be merged with the second synchronization operation comprises determining that the second synchronization operation arrived at the point of consistency while the first synchronization operation was pending.

11. The computer-implemented method of claim 8 , wherein determining that the first synchronization operation can be merged with the second synchronization operation comprises determining, based on metadata included in the first synchronization operation, that the second self-synchronizing memory store operation is forthcoming.

12. The computer-implemented method of claim 1 , wherein the point of consistency is located at a hub in the remote computing system.

13. A system comprising:

a first processor that:

generates a first self-synchronizing memory store operation that includes a first memory store operation and a first synchronization operation that includes metadata associated with a first location of a first synchronization object stored in a memory system, and

transmits the first self-synchronizing memory store operation to the memory system associated with a second processor; and

the second processor that:

determines that the first self-synchronizing memory store operation has arrived at a point of consistency in a remote computing system,

divides, at the point of consistency, the first self-synchronizing memory store operation into the first memory store operation and the first synchronization operation,

stores data included in the first memory store operation at the first location in the memory system, and

updates the first synchronization object based on the first synchronization operation.

14. The system of claim 13 , wherein the system further includes a third processor that:

generates a second self-synchronizing memory store operation that includes a second memory store operation and a second synchronization operation that includes metadata associated with a third location of a second synchronization object stored in the memory system, wherein the first memory store operation and the second memory store operation correspond to a first data transfer, and

transmits the second self-synchronizing memory store operation to the memory system associated with the second processor;

wherein the second processor further:

determines that the second self-synchronizing memory store operation has arrived at the point of consistency in the remote computing system,

divides, at the point of consistency, the second self-synchronizing memory store operation into the second memory store operation and the second synchronization operation,

stores data included in the second memory store operation at the third location in the memory system, and

updates the first synchronization object.

15. The system of claim 13 , wherein the system further includes a third processor and a fourth processor:

wherein the third processor:

determines that the first synchronization object has reached a target value; and

in response, reads the data stored during execution of the first memory store operation, and

wherein the fourth processor:

determines that the first synchronization object has reached the target value; and

in response, reads the data stored during execution of the first memory store operation.

16. The system of claim 13 , wherein the first synchronization object comprises a binary flag, and wherein, to update the first synchronization object, the second processor sets the binary flag.

17. The system of claim 13 , wherein the first synchronization object comprises a count of remote memory operations, and wherein, to update the first synchronization object, the second processor increments the count.

18. The system of claim 13 , wherein the first synchronization object comprises a count of a number of bytes transferred by remote memory operations, and wherein, to update the first synchronization object, the second processor adds a number of bytes included in the first memory store operation to the count.

19. The system of claim 18 , wherein the second processor further:

determines that a second self-synchronizing memory store operation has been demoted to a non-self-synchronizing memory store operation; and

adds a number of bytes included in the non-self-synchronizing memory store operation to the count.

20. The system of claim 13 , wherein:

the first processor further:

generates a second self-synchronizing memory store operation that includes a second memory store operation and a second synchronization operation that includes metadata associated with a third location of a second synchronization object stored in the memory system; and

transmits the second self-synchronizing memory store operation to the memory system, and

the second processor further:

determines the second synchronization operation cannot be processed;

demotes the second self-synchronizing memory store operation to the second memory store operation; and

stores data included in the second memory store operation at the third location in the memory system.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2022
From: MADUGULA, SRINIVAS SANTOSH KUMAR; GIROUX, OLIVIER; GANDHI, WISHWESH ANIL; PARKER, MICHAEL ALLEN; L, RAGHURAM; TANASIC, IVAN; PATEL, MANAN; HUMMEL, MARK; MINKIN, ALEXANDER L.
To: NVIDIA CORPORATION
Reel/Frame 062096/0531 →
Continuity (1)
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