IP Library › Granted Patent US 12,107,030
Granted Patent B2
US 12,107,030 · App. 17/581,970 · Granted Oct 1, 2024

Semiconductor device, semiconductor module, vehicle, and manufacturing method of semiconductor device

Inventor: Sho Takano (Hino, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L23/3735H01L21/4807H01L23/13H01L23/24H01L23/5385H01L25/072B60L50/00
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Quick Facts
Patent No.
US 12,107,030
App. No.
17/581,970
Granted
Oct 1, 2024
Kind
B2
Abstract

Provided is a semiconductor device including: a laminated substrate in which a circuit layer, an insulating layer, and a metal layer are sequentially laminated. A slit is formed in the circuit layer. A recess recessed from one surface side facing the insulating layer toward the other surface side is formed in the metal layer. The recess of the metal layer has a relaxation portion at least partially overlapping the slit of the circuit layer in a planar view.

Claims (41)

1. A semiconductor module comprising a laminated substrate in which a circuit layer, an insulating layer, and a metal layer are sequentially laminated, wherein

a slit is formed in the circuit layer,

a recess is formed in the metal layer, wherein the recess is recessed from one surface of the metal layer facing the insulating layer toward an other surface of the metal layer, and the recess has a bottom end that does not reach the other surface of the metal layer, and

the recess of the metal layer has a relaxation portion at least partially overlapping the slit of the circuit layer in a planar view, the relaxation portion relaxing an electric field strength in at least a portion of the insulating layer.

2. The semiconductor module according to claim 1 , wherein

the relaxation portion is integrally formed with the insulating layer.

3. The semiconductor module according to claim 2 , wherein

the relaxation portion is integrally formed with the insulating layer by a resin material.

4. The semiconductor module according to claim 3 , further comprising a sealing portion configured to at least partially seal the laminated substrate, wherein

the relaxation portion is integrally formed with the sealing portion and the insulating layer by the resin material.

5. The semiconductor module according to claim 3 , wherein

a thickness of the insulating layer formed of the resin material is 0.1 mm or less.

6. The semiconductor module according to claim 4 , wherein

a thickness of the insulating layer formed of the resin material is 0.1 mm or less.

7. The semiconductor module according to claim 1 , further comprising a sealing portion configured to at least partially seal the laminated substrate, wherein

the insulating layer is a plate material formed of a ceramic material.

8. The semiconductor module according to claim 1 , wherein

in a cross section of the laminated substrate in a laminating direction, a shape of an inner end portion of the metal layer adjacent to the relaxation portion and a shape of an inner end portion of the circuit layer forming the slit of the circuit layer have a portion being line-symmetric with each other with respect to the insulating layer about an extending direction of the insulating layer extending in one direction in the cross section.

9. The semiconductor module according to claim 2 , wherein

in a cross section of the laminated substrate in a laminating direction, a shape of an inner end portion of the metal layer adjacent to the relaxation portion and a shape of an inner end portion of the circuit layer forming the slit of the circuit layer have a portion being line-symmetric with each other with respect to the insulating layer about an extending direction of the insulating layer extending in one direction in the cross section.

10. The semiconductor module according to claim 3 , wherein

in a cross section of the laminated substrate in a laminating direction, a shape of an inner end portion of the metal layer adjacent to the relaxation portion and a shape of an inner end portion of the circuit layer forming the slit of the circuit layer have a portion being line-symmetric with each other with respect to the insulating layer about an extending direction of the insulating layer extending in one direction in the cross section.

11. The semiconductor module according to claim 4 , wherein

in a cross section of the laminated substrate in a laminating direction, a shape of an inner end portion of the metal layer adjacent to the relaxation portion and a shape of an inner end portion of the circuit layer forming the slit of the circuit layer have a portion being line-symmetric with each other with respect to the insulating layer about an extending direction of the insulating layer extending in one direction in the cross section.

12. The semiconductor module according to claim 5 , wherein

in a cross section of the laminated substrate in a laminating direction, a shape of an inner end portion of the metal layer adjacent to the relaxation portion and a shape of an inner end portion of the circuit layer forming the slit of the circuit layer have a portion being line-symmetric with each other with respect to the insulating layer about an extending direction of the insulating layer extending in one direction in the cross section.

13. The semiconductor module according to claim 1 , wherein

in a cross section of the laminated substrate in a laminating direction, a shape of an outer end portion in an outer peripheral portion of the metal layer and a shape of an outer end portion in an outer peripheral portion of the circuit layer have a portion being line-symmetric with each other with respect to the insulating layer about an extending direction of the insulating layer extending in one direction in the cross section.

14. The semiconductor module according to claim 1 , wherein

in a cross section of the laminated substrate in a laminating direction, a thickness of at least one end portion of an inner end portion of the metal layer adjacent to the relaxation portion and an inner end portion of the circuit layer forming the slit of the circuit layer is gradually reduced from one side adjacent to the insulating layer toward an other side, and the other side of the at least one end portion has a shape protruding so that a width of at least one of the relaxation portion or the slit corresponding to the at least one end portion is reduced.

15. The semiconductor module according to claim 1 , wherein

in a cross section of the laminated substrate in a laminating direction, a thickness of at least one end portion of an outer end portion in an outer peripheral portion of the metal layer and an outer end portion in an outer peripheral portion of the circuit layer is gradually reduced from one side adjacent to the insulating layer toward an other side, and the other side of the at least one end portion has a shape protruding toward an outside of at least one of the metal layer or the circuit layer corresponding to the at least one end portion.

16. The semiconductor module according to claim 1 , further comprising:

a second laminated substrate in which a second circuit layer, a second insulating layer, and a second metal layer are sequentially laminated, wherein

the laminated substrate is one of a circuit board or a wiring board facing the circuit board, and the second laminated substrate is another one of the circuit board or the wiring board, and

the wiring board is electrically and thermally connected to the circuit board.

17. A semiconductor device comprising:

a semiconductor module according to claim 1 ; and

a cooling device thermally bonded to the metal layer of the laminated substrate in the semiconductor module.

18. A vehicle comprising:

a control device provided with the semiconductor device according to claim 17 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2022
From: TAKANO, SHO
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 058820/0736 →
Priority Claims (1)
JP 2021-045102 · Mar 18, 2021 · national
Continuity (1)
Related Publication 20220301957A1 · Sep 22, 2022