IP Library › Granted Patent US 12,108,531
Granted Patent B2
US 12,108,531 · App. 17/756,541 · Granted Oct 1, 2024

Circuit board comprising via

Inventors: Kyo Hun Koo (Seoul, KR); Jin Hak Lee (Seoul, KR); In Ho Jeong (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
H05K1/115H05K1/0206H05K1/0218H05K3/424H05K2201/09563
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,108,531
App. No.
17/756,541
Granted
Oct 1, 2024
Kind
B2
Abstract

A circuit board according to an embodiment includes: an insulating layer including a through hole and a via disposed in the through hole and wherein the via including a first metal layer on an upper surface of the insulating layer and an inner wall of the through hole; and a second metal layer disposed in the through hole, and the an upper surface of the second metal layer includes a protruding portion that does not overlap an upper surface of the insulating layer in a vertical direction and is located higher than the first metal layer.

Claims (46)

1. A circuit board comprising:

a first insulating layer including a through hole passing through an upper surface and a lower surface opposite to the upper surface;

a first metal layer including a first portion disposed on the upper surface of the first insulating layer and a second portion disposed on an inner wall of the through hole; and

a second metal layer disposed on the second portion of the first metal layer and including an upper surface concave with respect to the upper surface of the first insulating layer;

wherein a horizontal width of the upper surface of the second metal layer is less than or equal to a width of an upper region of the through hole adjacent to the upper surface of the first insulating layer, and

wherein the upper surface of the second metal layer includes a protruding portion that does not overlap the upper surface of the first insulating layer in a vertical direction and is located higher than the first portion of the first metal layer.

2. The circuit board of claim 1 , wherein the horizontal width of the upper surface of the second metal layer is smaller than the width of the upper region of the through hole.

3. The circuit board of claim 1 , wherein the upper surface of the second metal layer includes:

a first region positioned lower than the upper surface of the first insulating layer; and

a second region more adjacent to the inner wall of the through hole than is the first region and positioned higher than the upper surface of the first insulating layer.

4. The circuit board of claim 1 , wherein the upper surface of the second metal layer does not overlap the upper surface of the first insulating layer in a vertical direction.

5. The circuit board of claim 1 , comprising:

a third metal layer disposed on the first portion of the first metal layer and the second metal layer; and

wherein the third metal layer includes a lower surface vertically overlapping with the upper surface of the second metal layer and convex toward the upper surface of the second metal layer.

6. The circuit board of claim 5 , wherein the lower surface of the third metal layer includes:

a third region positioned lower than the upper surface of the first insulating layer; and

a fourth region more adjacent to the inner wall of the through hole than is the third region and positioned higher than the upper surface of the first insulating layer.

7. The circuit board of claim 1 , wherein the second metal layer includes:

a first part adjacent to the upper surface of the first insulating layer and having a first inclination that decreases in width toward the lower surface of the first insulating layer; and

a second part adjacent to the lower surface of the first insulating layer and having a second inclination that increases in width toward the lower surface of the first insulating layer.

8. The circuit board of claim 7 , wherein the first inclination and the second inclination are inclined in different directions.

9. The circuit board of claim 1 , wherein the second metal layer includes a lower surface convex with respect to the lower surface of the first insulating layer, and

wherein a horizontal width of the lower surface of the second metal layer is less than or equal to a width of a lower region of the through hole adjacent to the lower surface of the first insulating layer.

10. The circuit board of claim 9 , wherein the horizontal width of the lower surface of the second metal layer is smaller than the width of the lower region of the through hole.

11. The circuit board of claim 9 , wherein the lower surface of the second metal layer includes:

a fifth region positioned higher than the lower surface of the first insulating layer; and

a sixth region more adjacent to the inner wall of the through hole than is the fifth region and positioned lower than the lower surface of the first insulating layer.

12. The circuit board of claim 9 , wherein the lower surface of the second metal layer does not overlap the lower surface of the first insulating layer in a vertical direction.

13. The circuit board of claim 9 , wherein the first metal layer includes a third portion disposed on the lower surface of the first insulating layer,

wherein a fourth metal layer is disposed under the third portion of the first metal layer and the second metal layer; and

wherein the fourth metal layer vertically overlaps the lower surface of the second metal layer and includes an upper surface convex toward the lower surface of the second metal layer.

14. The circuit board of claim 13 , wherein the upper surface of the fourth metal layer includes:

a seventh region positioned higher than the lower surface of the first insulating layer; and

an eighth region more adjacent to the inner wall of the through hole than is the seventh region and lower than the lower surface of the first insulating layer.

15. The circuit board of claim 1 , wherein a vertical distance from a lowest height of the upper surface of the second metal layer to the upper surface of the first insulating layer satisfies the range of 5% to 40% of a thickness of the first insulating layer.

16. The circuit board of claim 9 , wherein a vertical distance from a highest height of the lower surface of the second metal layer to the lower surface of the first insulating layer satisfies the range of 5% to 40% of a thickness of the first insulating layer.

17. The circuit board of claim 9 , comprising:

a second insulating layer disposed on the upper surface of the first insulating layer; and

a fifth metal layer vertically overlapping with the second metal layer and passing through the second insulating layer,

wherein a lower surface of the fifth metal layer is flat, and

wherein an upper surface of the fifth metal layer is concave with respect to an upper surface of the second insulating layer.

18. The circuit board of claim 9 , comprising:

a third insulating layer disposed under the lower surface of the first insulating layer; and

a sixth metal layer vertically overlapping with the second metal layer and passing through the third insulating layer,

wherein an upper surface of the sixth metal layer is flat, and

wherein a lower surface of the sixth metal layer is concave with respect to a lower surface of the third insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2023
From: KOO, KYO HUN; LEE, JIN HAK; JEONG, IN HO
To: LG INNOTEK CO., LTD.
Reel/Frame 063758/0407 →
Priority Claims (1)
KR 10-2019-0153968 · Nov 27, 2019 · national
Continuity (1)
Related Publication 20220418107A1 · Dec 29, 2022
Cited By (1)
US 12,702,024