IP Library › Granted Patent US 12,119,396
Granted Patent B2
US 12,119,396 · App. 17/494,639 · Granted Oct 15, 2024

Semiconductor device

Inventor: Yasunobu Saito (Ishikawa, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H01L29/7783H01L29/4236H01L29/7786H01L29/7787
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Quick Facts
Patent No.
US 12,119,396
App. No.
17/494,639
Granted
Oct 15, 2024
Kind
B2
Abstract

According to one embodiment, a semiconductor device comprises a first nitride semiconductor layer on a substrate and a second nitride semiconductor layer on the first nitride semiconductor layer. The second nitride semiconductor layer has a larger bandgap than the first nitride semiconductor layer. Source and drain electrodes are on the second nitride semiconductor layer. A gate electrode is between the source electrode and the drain electrode. A third nitride semiconductor layer of p-type conductivity is on the second nitride semiconductor layer between the drain electrode and the gate electrode and spaced from the drain electrode.

Claims (37)

1. A semiconductor device, comprising:

a first nitride semiconductor layer on a substrate;

a source electrode on the first nitride semiconductor layer;

a drain electrode on the first nitride semiconductor layer;

a gate electrode between the source electrode and the drain electrode;

a second nitride semiconductor region between the first nitride semiconductor layer and the drain electrode and being a material having a larger bandgap than the first nitride semiconductor layer;

a third nitride semiconductor region directly on the first nitride semiconductor layer, a lateral position of the third nitride semiconductor region being between a lateral position of a drain-side edge of the gate electrode and a lateral position of a gate-side edge of the drain electrode, a lateral surface of third nitride semiconductor region directly contacting the second nitride semiconductor region, the third nitride semiconductor region being a material having a bandgap larger than the first nitride semiconductor layer and less than or equal to the material of the second nitride semiconductor region; and

a fourth nitride semiconductor region between the first nitride semiconductor layer and the source electrode and being a material having a larger bandgap than the first nitride semiconductor layer and the material of the third nitride semiconductor region, wherein

the gate electrode is between the third nitride semiconductor region and the fourth nitride semiconductor region in a direction substantially parallel to a plane of the substrate.

2. The semiconductor device according claim 1 , wherein when a width d 3 of the third nitride semiconductor region in the direction substantially parallel to the plane of the substrate is subtracted from a shortest distance d 1 between the drain electrode and the gate electrode, the difference is within a range of 0.5 μm to 2 μm, endpoint inclusive.

3. The semiconductor device according claim 1 , wherein a ratio t 1 /t 3 for a thickness t 1 of the second nitride semiconductor region from the first nitride semiconductor layer to an uppermost surface and a thickness t 3 of the third nitride semiconductor region from the first nitride semiconductor layer to an uppermost surface is between 1 and 1.7, endpoint inclusive.

4. The semiconductor device according to claim 1 , further comprising:

an insulating film covering the third nitride semiconductor region, an upper surface of the second nitride semiconductor region, and an upper surface of the fourth nitride semiconductor region, wherein

the insulating film is between the gate electrode and the first nitride semiconductor layer,

the insulating film is between the gate electrode and the third nitride semiconductor region, and

the insulating film is between the gate electrode and the fourth nitride semiconductor region.

5. The semiconductor device according to claim 4 , wherein a portion of the insulating film is between a portion of the source electrode and the fourth nitride semiconductor region.

6. The semiconductor device according to claim 5 , wherein another portion of the insulating film is between a portion of the drain electrode and the second nitride semiconductor region.

7. The semiconductor device according to claim 4 , wherein the insulating film is silicon nitride.

8. The semiconductor device according to claim 4 , wherein the insulating film is silicon oxide.

9. The semiconductor device according to claim 1 , wherein the second nitride semiconductor region and the fourth nitride semiconductor region are each an aluminum gallium nitride material.

10. The semiconductor device according to claim 1 , wherein the gate electrode extends to a position level with a lowermost surface of the third nitride semiconductor region.

11. The semiconductor device according to claim 1 , wherein the second and fourth nitride semiconductor regions are each undoped aluminum gallium nitride.

12. The semiconductor device according to claim 1 , wherein the second nitride semiconductor region is an aluminum gallium nitride doped with silicon.

13. The semiconductor device according to claim 1 , wherein

the first nitride semiconductor layer comprises a material with a formula Al X Ga 1-X N, where X satisfies 0≤X<1,

the material of the second nitride semiconductor region comprises a material with a formula Al Y Ga 1-Y N, where Y satisfies 0<Y≤1 and X<Y, and

the material of the third nitride semiconductor region comprises a material with a formula Al Z Ga 1-Z N, where Z satisfies 0 <Z≤1 and X<Z<Y.

14. The semiconductor device according to claim 1 , wherein the third nitride semiconductor region has thickness between 15 nm to 30 nm, endpoint inclusive.

15. The semiconductor device according to claim 1 , wherein the source electrode, the drain electrode, and the gate electrode are metal.

16. The semiconductor device according to claim 1 , wherein the substrate is sapphire.

17. The semiconductor device according to claim 1 , further comprising:

a buffer layer between the substrate and the first nitride semiconductor layer.

18. The semiconductor device according to claim 1 , wherein a distance between the source electrode and the drain electrode in the direction substantially parallel to the substrate is between 5 microns and 30 microns, end point inclusive.

19. The semiconductor device according to claim 1 , further comprising:

an insulating film covering the third nitride semiconductor region, an upper surface of the second nitride semiconductor region, and an upper surface of the fourth nitride semiconductor region.

20. The semiconductor device according to claim 19 , wherein the insulating film is continuous from the source electrode to the drain electrode.

Priority Claims (1)
JP 2018-173396 · Sep 18, 2018 · national
Continuity (2)
Division 16287394 · Feb 27, 2019
Related Publication 20220029006A1 · Jan 27, 2022