Display device
A display device includes: a plurality of data lines extending in a first direction, and first to third pixels connected to the plurality of data lines. The first pixel includes a first pixel electrode overlapping the plurality of data lines in a plan view in a thickness direction. The second pixel includes a second pixel electrode spaced apart from the plurality of data lines in the plan view in the thickness direction. The third pixel includes a third pixel electrode overlapping the plurality of data lines in the plan view in the thickness direction.
1. A display device comprising:
a first data line extending in a first direction;
a second data line extending in the first direction and adjacent to the first data line;
a driving voltage line extending in the first direction and adjacent to the second data line;
a third data line extending in the first direction, wherein the driving voltage line is disposed between the second and third data lines;
a first pixel comprising a first pixel electrode connected to the first data line and overlapping the first and second data lines;
a second pixel comprising a second pixel electrode connected to the second data line and overlapping the driving voltage line;
a third pixel comprising a third pixel electrode connected to the third data line and overlapping the third data line,
wherein the driving voltage line comprises:
a first portion overlapping the second pixel electrode;
a second portion branched from the first portion and overlapping the first pixel electrode; and
a third portion branched from the first portion and overlapping the third pixel electrode, and
wherein a part of the second portion and a part of the third portion of the driving voltage line are parallel to each other.
2. The display device of claim 1 , wherein
the first pixel emits red light,
the second pixel emits green light, and
the third pixel emits blue light.
3. The display device of claim 1 , wherein
an area of the first pixel electrode is larger than an area of the second pixel electrode, and
an area of the third pixel electrode is larger than the area of the first pixel electrode.
4. The display device of claim 1 , wherein
the third pixel electrode is spaced apart from the first pixel electrode in a second direction perpendicular to the first direction, and
the second pixel electrode is spaced apart from the first pixel electrode in an oblique direction with respect to the first direction and the second direction.
5. The display device of claim 1 , wherein
the first pixel electrode and the third pixel electrode are disposed in a same, and
the second pixel electrode is disposed in a different row from the first and third pixel electrodes.
6. The display device of claim 1 , further comprising:
a first pixel circuit connected between the first data line and the first pixel electrode;
a second pixel circuit connected between the second data line and the second pixel electrode; and
a third pixel circuit connected between the third data line and the third pixel electrode.
7. The display device of claim 6 , wherein
the second pixel electrode is disposed between the second data line and the third data line.
8. The display device of claim 7 , wherein
the driving voltage line is disposed in a same layer as the first to third data lines.
9. The display device of claim 8 , wherein
a center portion of the first pixel electrode and a center portion of the third pixel electrode are spaced apart from the driving voltage line in the plan view in the thickness direction.
10. The display device of claim 6 , wherein the first pixel circuit comprises:
a first transistor which controls a driving current flowing through the first pixel electrode;
a second transistor which supplies a data voltage to a first node, which is connected to a source electrode of the first transistor;
a third transistor which connects a second node, which is connected to a drain electrode of the first transistor, to a third node, which is connected to a gate electrode of the first transistor; and
a first coupling capacitor connected between the first data line and a fourth node, which is connected to the first pixel electrode.
11. The display device of claim 10 , wherein the second pixel circuit comprises:
a first transistor which controls a driving current flowing through the second pixel electrode;
a second transistor which supplies a data voltage to a first node, which is connected to a source electrode of the first transistor, based on a first gate signal;
a third transistor which connects a second node, which is connected to a drain electrode of the first transistor, to a third node, which is connected to a gate electrode of the first transistor, based on a second gate signal; and
a second coupling capacitor connected between the second data line and a fourth node which is connected to the second pixel electrode.
12. The display device of claim 11 , wherein a capacitance of the first coupling capacitor is greater than a capacitance of the second coupling capacitor.
13. The display device of claim 10 , wherein the first pixel circuit further comprises:
a fourth transistor which supplies a first initialization voltage to the third node based on a third gate signal;
a fifth transistor which supplies a driving voltage to the first node based on an emission signal;
a sixth transistor which connects the second node to the fourth node based on the emission signal; and
a seventh transistor which supplies a second initialization voltage to the fourth node based on a fourth gate signal.
14. The display device of claim 13 , wherein the first pixel circuit further comprises an eighth transistor which supplies a bias voltage to the first node based on the fourth gate signal.
15. The display device of claim 13 , wherein
each of the first transistor, the second transistor, the fifth transistor, the sixth transistor, and the seventh transistor corresponds to a transistor of a first type, and
each of the third transistor and the fourth transistor corresponds to a transistor of a second type different from the first type.
16. The display device of claim 13 , wherein the first pixel circuit receives each of the first to third gate signals once during one frame period, and receives the fourth gate signal multiple times during the one frame period.
17. The display device of claim 13 , wherein the first pixel circuit receives the first to third gate signals during a first period in one frame period, and receives the fourth gate signal during the first period and a second period other than the first period in the one frame period.
18. The display device of claim 6 , further comprising:
a substrate;
a thin film transistor disposed on the substrate;
a passivation layer covering the thin film transistor; and
a planarization layer disposed on the passivation layer,
wherein the first and second data lines are disposed on the passivation layer, and
the first to third pixel electrodes are disposed on the planarization layer.
19. The display device of claim 18 , wherein a distance between the first data line and the first pixel electrode is shorter than a distance between the second data line and the second pixel electrode.
20. The display device of claim 18 , wherein a distance between the third data line and the third pixel electrode is shorter than a distance between the second data line and the second pixel electrode.