Memory system and refresh method

1. A memory system comprising:

a non-volatile memory having a plurality of physical blocks; and

a controller configured to execute a refresh for the plurality of blocks to rewrite data of a first plurality of blocks to a second plurality of blocks among the plurality of blocks,

wherein, in a first time period from (1) a previous writing to each block provided in the first plurality of blocks to (2) completion of the refresh for each block, the controller is configured to dynamically control a starting time of the refresh for each block,

wherein the controller is configured such that the refresh is started for any of each block in a fourth time period before the first time period, and

wherein an amount of blocks in which the refresh is started in a second half of the fourth time period is larger than an amount of blocks in which the refresh is started in a first half of the fourth time period.

2. The memory system according to claim 1 , if, with respect to a first block and a second block provided in the first plurality of blocks, a previous writing to the first block and the second block is executed at a same first timing,

wherein the controller is configured to control such that a second time period is different from a third time period, the second time period being from the first timing to a start of the refresh to the first block, the third time period being from the first timing to a start of the refresh to the second block.

3. The memory system according to claim 1 , wherein the controller is configured to control such that the refresh is started for a first number of blocks in the second half of the fourth time period, and the refresh is started for a second number of blocks, other than the first number of blocks, in a fifth time period after the second half of the fourth time period.

4. The memory system according to claim 1 , wherein the controller is configured to control a time at which the refresh is started based on an amount of a host I/O corresponding to read and write of data requested by a host.

5. The memory system according to claim 4 , wherein the controller is configured to:

acquire the amount of the host I/O for a given period, and

when a current amount of the host I/O is larger than the amount of the host I/O acquired for the given period, delay the time at which the refresh is started.

6. The memory system according to claim 1 , wherein the non-volatile memory includes a NAND flash memory.

7. The memory system according to claim 1 , wherein the controller is configured as a system on chip.

8. A refresh method comprising:

executing a refresh for a plurality of blocks of a non-volatile memory provided with a plurality of physical blocks to rewrite data of a first plurality of blocks to a second plurality of blocks, the first and second plurality of blocks provided in the plurality of blocks,

wherein, in the executing the refresh, in a first time period from (1) a previous writing to each block provided in the first plurality of blocks to (2) completion of the refresh for each block, a starting time for the refresh for each block is dynamically controlled; and

controlling the refresh such that the refresh is started for any of each block in a fourth time period before the first time period,

wherein an amount of blocks in which the refresh is started in a second half of the fourth time period is larger than an amount of blocks in which the refresh is started in a first half of the fourth time period.

9. The method according to claim 8 , further comprising: if, with respect to a first block and a second block provided among the first plurality of blocks, a previous writing to the first block and the second block is executed at a same first timing, controlling the refresh such that a second time period is different from a third time period, the second time period being from the first timing to a start of the refresh to the first block, the third time period being from the first timing to a start of the refresh to the second block.

10. The method according to claim 8 , further comprising:

controlling the start of the refresh for a first number of blocks in the second half of the fourth time period, and

controlling the start of the refresh for a second number of blocks, other than the first number of blocks, in a fifth time period, the fifth time period being after the second half of the fourth time period.

11. The method according to claim 8 , further comprising:

controlling a time at which the refresh is started based on an amount of a host I/O corresponding to a read and write of data requested by a host.

12. The method according to claim 11 , further comprising:

acquiring the amount of the host I/O for a given period, and

when a current amount of the host I/O is larger than the amount of the host I/O acquired for the given period, thereby delaying the time at which the refresh is started.

13. The method according to claim 8 , wherein the non-volatile memory includes a NAND flash memory.

14. A non-transitory computer readable medium storing instructions for a refresh method, wherein when the instructions are executed by a computer, performing the refresh method comprising:

executing a refresh for a plurality of blocks of a non-volatile memory provided with a plurality of physical blocks to rewrite data of a first plurality of blocks to a second plurality of blocks provided among the plurality of blocks,

wherein, in the executing the refresh, in a first time period from (1) a previous writing to each block provided in the first plurality of blocks to (2) completion of the refresh for each block, a starting time for the refresh for each block being dynamically controlled; and

controlling the refresh such that the refresh is started for any of each block in a fourth time period before the first time period,

wherein an amount of blocks in which the refresh is started in a second half of the fourth time period is larger than an amount of blocks in which the refresh is started in a first half of the fourth time period.

15. The non-transitory computer readable medium of claim 14 , wherein the instructions, when executed by the computer, are configured to perform the refresh method further comprising:

if, with respect to a first block and a second block provided among the first plurality of blocks, a previous writing to the first block and the second block is executed at a same first timing,

controlling the refresh such that a second time period is different from a third time period, the second time period being from the first timing to a start of the refresh to the first block, the third time period being from the first timing to a start of the refresh to the second block.

16. The non-transitory computer readable medium of claim 14 , wherein the instructions, when executed by the computer, are configured to perform the refresh method further comprising:

controlling the start of the refresh for a first number of blocks in the second half of the fourth time period, and

controlling the start of the refresh for a second number of blocks, other than the first number of blocks, in a fifth time period, the fifth time period being after the second half of the fourth time period.

17. The non-transitory computer readable medium of claim 14 , wherein the instructions, when executed by the computer, are configured to perform the refresh method further comprising:

controlling a time at which the refresh is started based on an amount of a host I/O corresponding to a read and write of data requested by a host.

18. The non-transitory computer readable medium of claim 17 , wherein the instructions, when executed by the computer, are configured to perform the refresh method further comprising:

acquiring the amount of the host I/O for a given period, and

when a current amount of the host I/O is larger than the amount of the host I/O acquired for the given period, delaying the time at which the refresh is started.

19. The non-transitory computer readable medium of claim 14 , wherein the non-volatile memory includes a NAND flash memory.