IP Library › Granted Patent US 12,136,667
Granted Patent B2
US 12,136,667 · App. 17/668,254 · Granted Nov 5, 2024

Transistor

Inventors: Blend Mohamad (Grenoble, FR); René Escoffier (Grenoble, FR)
Assignee: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
H01L29/7783H01L29/4236H01L29/66462H01L29/7788H01L21/8258H01L27/088
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Quick Facts
Patent No.
US 12,136,667
App. No.
17/668,254
Granted
Nov 5, 2024
Kind
B2
Abstract

A device including a first transistor, having a gate region partially penetrating into a gallium nitride layer, and a second transistor located inside of the gate region of the first transistor.

Claims (18)

1. Device comprising:

a first high electron mobility transistor comprising:

a first gallium nitride layer;

a second layer made of a first semiconductor material located on top of and in contact with the first layer, so that an electrode gas can form at an interface between the first and second layers; and

a first gate region crossing the second layer and partially penetrating into the first layer; and

a second transistor located inside of the first region and comprising:

second and third regions made of a second doped semiconductor material of a first conductivity type, the second semiconductor material being different from gallium nitride; and

a fourth channel region made of the second semiconductor material, non intentionally doped or doped with a second conductivity type opposite to the first conductivity type, interposed between the second and third regions, wherein a conductive material extends along a first side of a vertical portion of the first region and contacts the second region.

2. Device according to claim 1 , wherein the second semiconductor material is silicon.

3. Device according to claim 1 , wherein the conductive material further extends along a second side, opposite to the first side, of the vertical portion of the first region and contacts the third region.

4. Device according to claim 1 , wherein the first transistor comprises a first gate electrode located above the second transistor and insulated from the second transistor by a third insulating layer.

5. Device according to claim 4 , wherein the first transistor further comprises second and third electrodes, located on either side of the first electrode and partially penetrating into the first layer, the second electrode being closer to the first electrode than the third electrode and the first side being located on the side of the second electrode.

6. Device according to claim 5 , wherein the conductive material extending along the first side extends all the way to the second electrode.

7. Device according to claim 5 , wherein the conductive material integrally coats a side of the second region located on the side of the second electrode.

8. Device according to claim 4 , wherein the first electrode is planar and located on top of and in contact with the third insulating layer, a first side of the second transistor being coated with the conductive material.

9. Device according to claim 8 , wherein the second transistor occupies the vertical portion of the gate region of the first transistor, the fourth channel region crossing the second layer and partially penetrating into the first layer.

10. Device according to claim 4 , wherein the first electrode partially penetrates into the first layer, a first side of the first electrode being coated with the third insulating layer and with the conductive material.

11. Device according to claim 10 , wherein the second transistor is located in a lower portion of the gate region of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2022
From: MOHAMAD, BLEND; ESCOFFIER, RENÉ
To: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
Reel/Frame 059314/0276 →
Priority Claims (1)
FR 2101480 · Feb 16, 2021 · national
Continuity (1)
Related Publication 20220262938A1 · Aug 18, 2022