IP Library › Granted Patent US 12,144,205
Granted Patent B2
US 12,144,205 · App. 17/600,486 · Granted Nov 12, 2024

Display panel, manufacturing method for display panel, and display apparatus

Inventor: Zehu Hu (Shenzhen, CN)
Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
H10K59/122H10K59/123H10K59/124H10K59/8051H10K71/00H10K59/1201
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Quick Facts
Patent No.
US 12,144,205
App. No.
17/600,486
Granted
Nov 12, 2024
Kind
B2
Abstract

The present application provides a display panel, a manufacturing method for a display panel, and a display apparatus. The display panel includes an array substrate including a planarization layer, the planarization layer being provided with a groove; a pixel definition layer (PDL) arranged on the planarization layer and filling the groove, the PDL being provided with a pixel opening; and an anode arranged between the planarization layer and the PDL, an end of the anode being placed in the groove, and a middle portion of the anode being exposed in the pixel opening.

Claims (35)

1. A display panel, comprising:

an array substrate comprising a planarization layer, the planarization layer being provided with a groove;

a pixel definition layer (PDL) arranged on the planarization layer and filling the groove, the PDL being provided with a pixel opening; and

an anode arranged between the planarization layer and the PDL, an end of the anode being placed in the groove, and a middle portion of the anode being exposed in the pixel opening;

wherein the groove comprises a first groove body and a second groove body that are spaced;

wherein the end of the anode being placed in the groove comprises one end of the anode being located in the first groove body, and another end of the anode being located in the second groove body;

wherein the array substrate comprises a base, an active layer, a gate layer, and a source-drain layer that are stacked in sequence, the planarization layer is disposed on the source-drain layer, and the source-drain layer comprises a source and a drain; and

the planarization layer is provided with a through hole, the through hole communicates with the second groove body, the source is partially exposed in the through hole, and the anode is in contact with the source via the through hole.

2. The display panel according to claim 1 , wherein a gap is provided between the anode and a sidewall of the groove.

3. The display panel according to claim 1 , further comprising:

a transition layer arranged between the drain source and the anode, the transition layer filling the through hole.

4. The display panel according to claim 1 , wherein a height of the groove ranges from 0.5 μm to 1 μm, and the height is a distance from a bottom wall of the groove to an opening end face of the groove.

5. The display panel according to claim 1 , wherein a distance between one side of the PDL that faces away from the planarization layer and a bottom wall of the groove ranges from 0.6 μm to 7 μm.

6. The display panel according to claim 1 , wherein the PDL comprises:

a plurality of first sub-pixel definition layers, orthographic projections thereof on the array substrate being arranged in a first direction; and

a plurality of second sub-pixel definition layers, orthographic projections thereof on the array substrate being arranged in a second direction, a height of the second sub-pixel definition layer being greater than a height of the first sub-pixel definition layer, and the first direction and the second direction intersecting.

7. The display panel according to claim 6 , wherein a luminescent material of a same color is arranged between two adjacent second sub-pixel definition layers, and the luminescent material covers the first sub-pixel definition layer between the two second sub-pixel definition layers.

8. The display panel according to claim 1 , wherein the anode comprises a first transparent electrode, a metal electrode, and a second transparent electrode that are stacked in sequence.

9. A display apparatus, comprising a display panel, wherein the display panel comprises:

an array substrate comprising a planarization layer, the planarization layer being provided with a groove;

a pixel definition layer (PDL) arranged on the planarization layer and filling the groove, the PDL being provided with a pixel opening; and

an anode arranged between the planarization layer and the PDL, an end of the anode being placed in the groove, and a middle portion of the anode being exposed in the pixel opening;

wherein the groove comprises a first groove body and a second groove body that are spaced;

wherein the end of the anode being placed in the groove comprises one end of the anode being located in the first groove body, and another end of the anode being located in the second groove body;

wherein the array substrate comprises a base, an active layer, a gate layer, and a source-drain layer that are stacked in sequence, the planarization layer is disposed on the source-drain layer, and the source-drain layer comprises a source and a drain; and

the planarization layer is provided with a through hole, the through hole communicates with the second groove body, the source is partially exposed in the through hole, and the anode is in contact with the source via the through hole.

10. The display apparatus according to claim 9 , wherein a gap is provided between the anode and a sidewall of groove.

11. The display apparatus according to claim 9 , wherein the display panel further comprises:

a transition layer arranged between the source and the anode, the transition layer filling the through hole.

12. The display apparatus according to claim 9 , wherein a height of the groove ranges from 0.5 μm to 1 μm, and the height is a distance from a bottom wall of the groove to an opening end face of the groove.

13. The display apparatus according to claim 9 , wherein the PDL comprises:

a plurality of first sub-pixel definition layers, orthographic projections thereof on the array substrate being arranged in a first direction; and

a plurality of second sub-pixel definition layers, orthographic projections thereof on the array substrate being arranged in a second direction, a height of the second sub-pixel definition layer being greater than a height of the first sub-pixel definition layer, and the first direction and the second direction intersecting.

14. The display apparatus according to claim 13 , wherein a luminescent material of a same color is arranged between two adjacent second sub-pixel definition layers, and the luminescent material covers the first sub-pixel definition layer between the two second sub-pixel definition layers.

15. The display apparatus according to claim 9 , wherein the anode comprises a first transparent electrode, a metal electrode, and a second transparent electrode that are stacked in sequence.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2021
From: HU, ZEHU
To: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 057659/0929 →
Priority Claims (1)
CN 202110935889.2 · Aug 16, 2021 · national
Continuity (1)
Related Publication 20230050529A1 · Feb 16, 2023