Processor with an elliptic curve cryptographic algorithm and a data processing method thereof

1. A processor with an elliptic curve cryptographic algorithm, comprising:

a first register, storing a private key pointer, pointing to a private key; and

a third register;

wherein:

in response to a single elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a ciphertext input from a first storage space within a system memory, performing a decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on the private key obtained by referring to the first register to decrypt the ciphertext input and generate a plaintext output, and programming the plaintext output into a second storage space within the system memory;

the third register stores an intermediate variable pointer that points to a third storage space within the system memory;

an intermediate variable generated by the processor while performing the decryption procedure on the ciphertext input is stored in the third storage space as indicated by the intermediate variable pointer obtained from the third register; and

prior to performing the decryption procedure on the ciphertext input, the processor stores a starting address of the third storage space in the third register, and resets all bytes in the third storage space to zero.

2. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , wherein:

parameters used in the single elliptic curve cryptographic instruction include a ciphertext input pointer pointing to the first storage space, a plaintext output pointer pointing to the second memory space, and the private key pointer.

3. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:

a second register, storing a length of the ciphertext input.

4. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , wherein:

the third storage space is allocated by an operating system according to a request from software.

5. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:

a second register, storing a length of the ciphertext input;

wherein when finishing the decryption procedure on the ciphertext input, the processor overwrites the second register with a length of the plaintext output.

6. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:

a fourth register, storing a plaintext output pointer, pointing to the second storage space;

wherein when finishing the decryption procedure on the ciphertext input, the processor produces an address increment on the plaintext output pointer stored in the fourth register, and the address increment is equal to a length of the plaintext output.

7. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:

a fifth register, storing a ciphertext input pointer pointing to the first storage space;

wherein when finishing the decryption procedure on the ciphertext input, the processor produces an address increment on the ciphertext input pointer stored in the fifth register, and the address increment is equal to a length of the ciphertext input.

8. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:

a sixth register, storing a control word, indicating performing the decryption procedure in response to the single elliptic curve cryptographic instruction.

9. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:

a cryptographic unit;

a set of architectural registers including the first register;

a microcode storage device, storing microcode; and

a decoder, generating a plurality of microinstructions based on the microcode in response to the single elliptic curve cryptographic instruction;

wherein:

according to the microinstructions:

the set of architectural registers is defined, read and updated; and

when a register of the set of architectural registers provides a control word indicating a decryption code, the cryptographic unit using the set of architectural registers performs the decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on the private key.

10. The processor with the elliptic curve cryptographic algorithm as claimed in claim 9 , wherein:

the cryptographic unit includes an elliptic curve cryptographic acceleration engine; and

the elliptic curve cryptographic acceleration engine includes hardware for point multiplication that receives an elliptic curve input point and a big number input to generate an elliptic curve output point.

11. The processor with the elliptic curve cryptographic algorithm as claimed in claim 10 , wherein:

according to the microinstructions, the processor determines whether a ciphertext part, C 1 , extracted from the ciphertext input satisfies an elliptic curve, where the ciphertext input is C, C=C 1 ∥C 2 ∥C 3 or C 1 ∥C 3 ∥C 2 , and C 2 and C 3 are ciphertext parts;

if the ciphertext part, C 1 does not satisfy the elliptic curve, the processor outputs a decryption failure prompt;

the microinstructions decoded from the single elliptic curve cryptographic instruction includes a first point multiplication microinstruction, which is executed when the ciphertext part, C 1 satisfies the elliptic curve;

in response to the first point multiplication microinstruction, the hardware for point multiplication performs a calculation, S=[h]C 1 , where h is an elliptic curve cofactor used as the big number input, C 1 is used as the elliptic curve input point, and S is the elliptic curve output point generated by the hardware for point multiplication; and

according to the microinstructions, the processor checks whether S is a zero point and, if yes, the processor outputs a decryption failure prompt.

12. The processor with the elliptic curve cryptographic algorithm as claimed in claim 11 wherein:

the microinstructions decoded from the single elliptic curve cryptographic instruction includes a second point multiplication microinstruction;

if S is not a zero point, in response to the second point multiplication microinstruction, the hardware for point multiplication performs a calculation, (x 2 , y 2 )=[d B ]C 1 , where d B is the private key used as the big number input, and (x 2 , y 2 ) is the elliptic curve output point generated by the hardware for point multiplication;

according to the microinstructions, a calculation, t=KDF(x 2 ∥y 2 ∥klen), is performed, where KDF(⋅) is a key derivation function, klen is a bit length of the ciphertext part C 2 , and t is a derived key; and

according to the microinstructions, the processor checks whether t is zero and, if yes, the processor outputs a decryption failure prompt.

13. The processor with the elliptic curve cryptographic algorithm as claimed in claim 12 , wherein:

if t is not zero, according to the microinstructions, an XOR calculation,

M′=C 2 ⊕t, is performed; and

according to the microinstructions, if a Hash value, u, evaluated from M′ is equal to the ciphertext part C 3 , the processor outputs M′ as the plaintext output, where the Hash value, u, is equal to Hash(x 2 ∥M′∥y 2 ); and

if the Hash value, u, is not equal to the ciphertext part C 3 , the processor outputs a decryption failure prompt.

14. The processor with the elliptic curve cryptographic algorithm as claimed in claim 10 , wherein the hardware for point multiplication further comprises:

hardware for a first coordinate system conversion, converting the elliptic curve input point that is an affine coordinate point into a first intermediate point that is an aggravated projective coordinate point;

hardware for multiple point calculation, using the big number input to perform a multiple point calculation on the first intermediate point to generate a second intermediate point; and

hardware for a second coordinate system conversion, converting the second intermediate point that is an aggravated projective coordinate point into the elliptic curve output point that is an affine coordinate point.

15. The processor with the elliptic curve cryptographic algorithm as claimed in claim 10 , wherein:

the elliptic curve cryptographic acceleration engine includes hardware for preprocessing;

the cryptographic unit comprises a Hash cryptographic acceleration engine;

the microinstructions decoded from the single elliptic curve cryptographic instruction further include a preprocessing microinstruction;

in response to the preprocessing microinstruction, the hardware for preprocessing divides a message, (x 2 ∥M′∥y 2 ), with finished message padding into message blocks to be sent into the Hash cryptographic acceleration engine for a Hash value transform; and

the hardware for preprocessing includes an internal storage space storing an initial Hash value that is gradually updated by the Hash cryptographic acceleration engine till a Hash value, Hash(x 2 ∥M′∥y 2 ), is updated into the internal storage space as a Hash value, u.

16. A method for performing an elliptic curve cryptographic algorithm using a processor, comprising:

in response to a single elliptic curve cryptographic instruction of an instruction set architecture, reading a ciphertext input from a first storage space of a system memory, performing a decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on a private key to decrypt the ciphertext input and generate a plaintext output, and programming the plaintext output into a second storage space of the system memory;

storing an intermediate variable, generated while performing the decryption procedure on the ciphertext input, in a third storage space within the system memory; and

prior to performing the decryption procedure on the ciphertext input, resetting all bytes in the third storage space to zero.

17. The method as claimed in claim 16 , wherein:

parameters used in the single elliptic curve cryptographic instruction include a ciphertext input pointer pointing to the first storage space, a plaintext output pointer pointing to the second memory space, and a private key pointer pointing to the private key.

18. The method as claimed in claim 16 , wherein:

the third storage space is allocated by an operating system according to a request from software.

19. The method as claimed in claim 16 , further comprising:

generating a plurality of microinstructions based on microcode in response to the single elliptic curve cryptographic instruction; and

according to the microinstructions, if a control word indicates a decryption code, performing the decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on the private key.