Secured execution context data
There is disclosed a circuit for monitoring the security of a processor, wherein the circuit is configured to access a memory configured to store execution context data of a software program executed by the processor; to determine one or more signatures from said execution context data; and to compare said signatures with predefined signatures to monitor the security of the processor ( 110 ). Developments describe that context data can comprise control flow data, that a signature can comprise a hash value or a similarity signature, or that the integrity of signatures can be verified for example by using a secret key (e.g. obtained by random, or by using a physically unclonable function). Further developments describe various controls or retroactions on the processor, as well as various countermeasures if cyber attacks are determined.
1. A system comprising:
a processor,
a circuit, and
a memory,
wherein the processor is configured to determine first execution context data in response to the execution of a software program,
the processor being configured to write data from the processor's internal registers to a checksum generation hardware function, embodied in the circuit,
the circuit being configured to compute a first hash signature using a first hash value of the first execution context data, store the first signature in the memory and copy the first execution context data from the processor's internal registers to the memory; and
wherein the circuit is configured to monitor the security of the processor,
the processor being configured to determine second execution context data,
the circuit being configured to compute a second hash value of the second execution context data, and to retrieve from the memory a signature corresponding to the second execution context data,
the circuit being configured to compare the first and the second signatures,
wherein the circuit is configured to restore the execution context data from the memory to the processor internal registers if the first and the second signatures match,
wherein the circuit is further configured to use a secret key in conjunction with the hash function to verify an integrity of the execution context data.
2. The system of claim 1 , wherein the key is randomly initialized during an initialization of the processor.
3. The system of claim 1 , wherein the key is generated using a Physically Unclonable Function and/or a challenge-response device.
4. The system of claim 1 , wherein the secret key is used in a HMAC mode.
5. The system of claim 1 , wherein the secret key is generated by a true random generator.
6. The system of claim 1 , wherein the secret key is stored on a non-volatile memory.
7. The system of claim 1 , wherein the circuit comprises a sub circuit configured to perform the comparing, the sub-circuit being a part of a Direct Memory Access controller and/or of a bus interface of the processor.
8. The system of claim 1 , wherein the software program further comprising one or more of: 1) an executable instruction, 2) a plurality of executable instructions, 3) a thread of executable instructions, 4) a plurality of threads, 5) a task, or 6) a software process.
9. The system of claim 1 wherein the processor and the circuit access physically and/or logically distinct memories.
10. The system of claim 1 wherein the execution context data are accessed, in response to a change in the execution context data if the operating system switches between different software programs and/or at predefined time intervals according to a data capture frequency determined based on a clock frequency of the processor and/or depending on volumes of accessible data.
11. The system of claim 1 , wherein in response to the restoration of the execution context data, the software program continues.