IP Library › Granted Patent US 12,159,576
Granted Patent B2
US 12,159,576 · App. 17/454,973 · Granted Dec 3, 2024

Display device

Inventor: Keun Woo Kim (Seongnam-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3233H10K59/1213H10K71/00G09G2300/0819H01L29/42384H01L29/78696H10K59/1201
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Quick Facts
Patent No.
US 12,159,576
App. No.
17/454,973
Granted
Dec 3, 2024
Kind
B2
Abstract

A display device includes a first transistor configured to control a driving current flowing from a first electrode to a second electrode according to a voltage applied to a gate electrode of the first transistor, and a second transistor between the second electrode of the first transistor and the gate electrode of the first transistor, the second transistor including a first sub-transistor and a second sub-transistor. A same scan signal is to be transmitted to a gate electrode of the first sub-transistor and a gate electrode of the second sub-transistor. A gate insulating layer of the first sub-transistor includes a first thickness. A gate insulating layer of the second sub-transistor includes a second thickness smaller than the first thickness.

Claims (49)

1. A display device comprising:

a first transistor configured to control a driving current flowing from a first electrode to a second electrode according to a voltage applied to a gate electrode of the first transistor; and

a second transistor between the second electrode of the first transistor and the gate electrode of the first transistor, the second transistor comprising a first sub-transistor and a second sub-transistor,

wherein a same scan signal is to be transmitted to a gate electrode of the first sub-transistor and a gate electrode of the second sub-transistor,

wherein the gate electrode of the second sub-transistor is at a layer different from the gate electrode of the first sub-transistor,

wherein a gate insulating layer of the first sub-transistor comprises a first thickness, and

wherein a gate insulating layer of the second sub-transistor comprises a second thickness smaller than the first thickness.

2. The display device of claim 1 , wherein the gate electrode of the first sub-transistor is formed of a first conductive layer, and

wherein the gate electrode of the second sub-transistor is formed of a second conductive layer different from the first conductive layer.

3. The display device of claim 2 , wherein the gate insulating layer of the first sub-transistor and the gate insulating layer of the second sub-transistor comprise a first insulating layer, and

wherein the gate insulating layer of the first sub-transistor further comprises a second insulating layer.

4. The display device of claim 1 , wherein the gate electrode of the first sub-transistor and the gate electrode of the second sub-transistor are at a same layer.

5. The display device of claim 1 , wherein the second sub-transistor is between the first electrode of the first sub-transistor and the second electrode of the first transistor.

6. The display device of claim 1 , wherein the gate electrode of the first sub-transistor comprises a first length, and

wherein the gate electrode of the second sub-transistor comprises a second length greater than the first length.

7. The display device of claim 6 , wherein the gate electrode of the first sub-transistor comprises a first width, and

wherein the gate electrode of the second sub-transistor comprises a second width greater than the first width.

8. The display device of claim 1 , wherein the first transistor comprises a channel region comprising impurity ions, a first area, and a second area, the first area and the second area being located sequentially in a thickness direction, and

wherein a concentration of the impurity ions in the channel region of the first transistor has a highest point in the first area and a lowest point in the second area.

9. The display device of claim 8 , wherein the concentration of the impurity ions increases from the lowest point toward the highest point, and

wherein the impurity ions comprise fluorine.

10. The display device of claim 9 , wherein the highest point of the concentration of the impurity ions is located at a lower surface of the channel region of the first transistor.

11. The display device of claim 1 , further comprising a third transistor electrically connected to the first electrode of the first transistor, the third transistor being configured to transmit a data signal to the first transistor.

12. The display device of claim 11 , further comprising a light emitting element electrically connected to the second electrode of the first transistor, the light emitting element being configured to emit light according to the driving current.

13. A display device comprising:

a first transistor configured to control a driving current flowing from a first electrode to a second electrode according to a voltage applied to a gate electrode of the first transistor; and

a second transistor between the second electrode of the first transistor and the gate electrode of the first transistor, the second transistor comprises a first sub-transistor and a second sub-transistor,

wherein a same scan signal is to be transmitted to a gate electrode of the first sub-transistor and a gate electrode of the second sub-transistor,

wherein the gate electrode of the second sub-transistor is at a layer different from the gate electrode of the first sub-transistor,

wherein the gate electrode of the first sub-transistor is formed of a first conductive layer, and

wherein the gate electrode of the second sub-transistor is formed of a second conductive layer different from the first conductive layer.

14. The display device of claim 13 , wherein a gate insulating layer of the first sub-transistor comprises a first thickness, and

wherein a gate insulating layer of the second sub-transistor comprises a second thickness smaller than the first thickness.

15. The display device of claim 14 , wherein the gate insulating layer of the first sub-transistor and the gate insulating layer of the second sub-transistor comprise a first insulating layer, and

wherein the gate insulating layer of the first sub-transistor further comprises a second insulating layer.

16. The display device of claim 15 , wherein the gate electrode of the first sub-transistor and the gate electrode of the second sub-transistor are at different layers from each other.

17. A display device comprising:

a substrate;

a semiconductor layer on the substrate, the semiconductor layer comprising a first channel region of a first sub-transistor and a second channel region of a second sub-transistor;

a first insulating layer on the semiconductor layer;

a gate electrode of the second sub-transistor on the first insulating layer;

a second insulating layer on the gate electrode of the second sub-transistor; and

a gate electrode of the first sub-transistor on the second insulating layer,

wherein a same scan signal is to be transmitted to the gate electrode of the first sub-transistor and the gate electrode of the second sub-transistor.

18. The display device of claim 17 , wherein a thickness between the first channel region of the first sub-transistor and the gate electrode of the first sub-transistor is greater than a thickness between the second channel region of the second sub-transistor and the gate electrode of the second sub-transistor.

19. The display device of claim 18 , wherein the gate electrode of the first sub-transistor and the gate electrode of the second sub-transistor are at different layers from each other.

20. The display device of claim 17 , further comprising a first transistor configured to control a driving current flowing from a first electrode to a second electrode according to a voltage applied to a gate electrode of the first transistor,

wherein the first sub-transistor is between the second electrode of the first transistor and the gate electrode of the first transistor, and

wherein the second sub-transistor is between the first electrode of the first sub-transistor and the second electrode of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2024
From: KIM, KEUN WOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 068721/0666 →
Priority Claims (1)
KR 10-2021-0036589 · Mar 22, 2021 · national
Continuity (1)
Related Publication 20220301505A1 · Sep 22, 2022
Cited By (1)
US 12,453,254