IP Library Granted Patent US 12,164,412
Granted Patent B2
US 12,164,412 · App. 17/525,784 · Granted Dec 10, 2024

System and method for identifying performance bottlenecks

Inventors: Spandan Garg (Calgary, CA); Roshanak Zilouchian Moghaddam (Kirkland, WA); Paul Sean Harrington (Seattle, WA); Chen Wu (Shanghai, CN); Neelakantan Sundaresan (Bellevue, WA)
Assignee: Microsoft Technology Licensing, LLC
G06F11/3612G06F11/3636
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Quick Facts
Patent No.
US 12,164,412
App. No.
17/525,784
Granted
Dec 10, 2024
Kind
B2
Abstract

A computer implemented method includes accessing performance trace data for executed code of multiple services. Symbols corresponding to functions of the executed code are identified. First sequences of functions from the identified symbols are identified and a first performance threshold for each identified first sequence of functions is computed. The method includes receiving an incoming performance trace, detecting second sequences of functions from the incoming performance trace, identifying second sequences equivalent to the first sequences, and comparing performance of the identified second sequences to the first performance threshold for each of the equivalent first sequences to identify second sequences as comprising a performance bottleneck.

Claims (59)

1. A computer implemented method comprising:

accessing performance trace data for executed code of existing programs, from an open source code repository, written by many users over multiple domains;

identifying symbols corresponding to functions of the executed code;

identifying first sequences of functions from the identified symbols;

computing a first performance threshold for each identified first sequence of functions, the first performance threshold based on first sequences consuming more resources than normal;

receiving an incoming performance trace from execution of current code of a new application being developed that is different from the existing programs;

detecting second sequences of functions from the incoming performance trace;

identifying second sequences equivalent to the first sequences;

comparing performance of the identified second sequences to the first performance threshold for each of the equivalent first sequences to identify second sequences as comprising a performance bottleneck;

identifying code from one of the second sequences;

providing the identified code to a model trained on training data comprising examples of existing program code, existing program contextual elements, and a label comprising a corresponding fix; and

receiving code from the model to fix the one of the second sequences.

2. The method of claim 1 and further comprising identifying recommendations by comparing identified second sequences to prior identified sequence issues and corresponding recommendations for addressing the performance bottleneck.

3. The method of claim 1 wherein the model comprises a language understanding transformer model.

4. The method of claim 1 wherein the performance traces are generated by sampling a CPU stack.

5. The method of claim 1 wherein each symbol includes a module name, a class, a method, and method parameters.

6. The method of claim 1 and further comprising:

identifying common module names across the existing programs traces to identify commonly used modules; and

removing symbols corresponding to system modules prior to identifying the first sequences.

7. The method of claim 1 wherein identifying first sequences comprises identifying n-gram/sequences by comparing relative frequencies of an n-gram sequence with its n−1 gram sequence and keeping longer sequences having occurrences of similar or higher frequency.

8. The method of claim 1 wherein identifying performance thresholds for first sequences is based on computing resource usage of such sequences in the accessed performance trace data higher than a selected percentage for the existing programs.

9. The method of claim 8 wherein the selected percentage is between the 95 th and 99 th percentile.

10. The method of claim 1 wherein the first performance threshold comprises separate first performance thresholds for memory usage and CPU usage.

11. A machine-readable storage device having instructions for execution by a processor of a machine to cause the processor to perform operations to perform a method, the operations comprising:

accessing performance trace data for executed code of existing programs, from an open source code repository, written by many users over multiple domains;

identifying symbols corresponding to functions of the executed code;

identifying first sequences of functions from the identified symbols;

computing a first performance threshold for each identified first sequence of functions, the first performance threshold based on first sequences consuming more resources than normal;

receiving an incoming performance trace from execution of current code of a new application being developed that is different from the existing programs;

detecting second sequences of functions from the incoming performance trace;

identifying second sequences equivalent to the first sequences;

comparing performance of the identified second sequences to the first performance threshold for each of the equivalent first sequences to identify second sequences as comprising a performance bottleneck;

identifying code from one of the second sequences;

providing the identified code to a model trained on training data comprising examples of existing program code, existing program contextual elements, and a label comprising a corresponding fix; and

receiving code from the model to fix the one of the second sequences.

12. The device of claim 11 wherein the operations further comprise identifying recommendations by comparing identified second sequences to prior identified sequence issues and corresponding recommendations for addressing the performance bottleneck.

13. The device of claim 11 wherein the model comprises a language understanding transformer model.

14. The device of claim 11 wherein the performance traces are generated by sampling a CPU stack, wherein each symbol includes a module name, a class, a method, and method parameters, and wherein the first performance threshold comprises separate first performance thresholds for memory usage and CPU usage.

15. The device of claim 11 wherein the operations further comprise:

identifying common module names across existing programs traces to identify commonly used modules; and

removing symbols corresponding to system modules prior to identifying the first sequences.

16. The device of claim 11 wherein identifying first sequences comprises identifying n-gram/sequences by comparing relative frequencies of an n-gram sequence with its n−1 gram sequence and keeping longer sequences having occurrences of similar or higher frequency.

17. The method of claim 11 wherein identifying performance thresholds for first sequences is based on computing resource usage of such sequences in the accessed performance trace data higher than a selected percentage for the existing programs.

18. A device comprising:

a processor; and

a memory device coupled to the processor and having a program stored thereon for execution by the processor to perform operations comprising:

accessing performance trace data for executed code of existing programs, from an open source code repository, written by many users over multiple domains;

identifying symbols corresponding to functions of the executed code;

identifying first sequences of functions from the identified symbols;

computing a first performance threshold for each identified first sequence of functions, the first performance threshold based on first sequences consuming more resources than normal;

receiving an incoming performance trace from execution of current code of a new application being developed that is different from the existing programs;

detecting second sequences of functions from the incoming performance trace;

identifying second sequences equivalent to the first sequences;

comparing performance of the identified second sequences to the first performance threshold for each of the equivalent first sequences to identify second sequences as comprising a performance bottleneck;

identifying code from one of the second sequences;

providing the identified code to a model trained on training data comprising examples of existing program code, existing program contextual elements, and a label comprising a corresponding fix; and

receiving code from the model to fix the one of the second sequences.

19. The device of claim 18 wherein the operations further comprise identifying recommendations by comparing identified second sequences to prior identified sequence issues and corresponding recommendations for addressing the performance bottleneck.

20. The device of claim 18 wherein the performance traces are generated by sampling a CPU stack, wherein each symbol includes a module name, a class, a method, and method parameters.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2021
From: GARG, SPANDAN; ZILOUCHIAN MOGHADDAM, ROSHANAK; HARRINGTON, PAUL SEAN; WU, CHEN; SUNDARESAN, NEELAKANTAN
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 058270/0498 →
Continuity (1)
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