IP Library Granted Patent US 12,165,049
Granted Patent B2
US 12,165,049 · App. 18/201,217 · Granted Dec 10, 2024

Imaging device, imaging module, electronic device, and imaging system

Inventors: Takayuki Ikeda (Atsugi, JP); Takahiro Fukutome (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G06N3/0675G06N3/04G06N3/065H01L27/14609H01L27/14616H01L27/14618H04N23/57H04N25/75H04N25/77H01L27/1225H01L27/14627H01L27/14636H01L27/1464H01L27/14689H01L29/78633H01L29/78648H01L29/7869H01L29/78696H01L2224/48091
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Quick Facts
Patent No.
US 12,165,049
App. No.
18/201,217
Granted
Dec 10, 2024
Kind
B2
Abstract

An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.

Claims (30)

1. An imaging device comprising a plurality of circuits,

wherein the plurality of circuits each comprises:

a plurality of pixels; and

a first circuit configured to perform an arithmetic operation using a plurality of first signals output from the plurality of pixels,

wherein the plurality of pixels each comprises:

a second circuit configured to generate a second signal;

a third circuit configured to retain a potential corresponding to a weight coefficient; and

an operation circuit configured to receive the potential corresponding to the weight coefficient and to multiply the second signal by the weight coefficient, so that one of the first signals is generated,

wherein the second circuit comprises a first transistor,

wherein the third circuit comprises a second transistor and a capacitor,

wherein the operation circuit comprises a third transistor, and

wherein the operation circuit is electrically connected to one of a source and a drain of the second transistor and one electrode of the capacitor.

2. The imaging device according to claim 1 ,

wherein the second circuit further comprises a photoelectric conversion element,

wherein the first transistor is configured to control an output of the second signal in accordance with an output signal from the photoelectric conversion element, and

wherein a layer comprising the first transistor is located over a layer comprising the first circuit, and the photoelectric conversion element is located over the layer comprising the first transistor.

3. The imaging device according to claim 1 , wherein the operation circuit comprises at least a part of a neural network.

4. An imaging device comprising a plurality of pixels;

wherein the plurality of pixels each comprises:

a first circuit configured to generate a first signal;

a second circuit configured to retain a potential corresponding to a weight coefficient; and

an operation circuit configured to receive the potential corresponding to the weight coefficient and to multiply the first signal by the weight coefficient, so that an output signal is generated,

wherein the first circuit comprises a first transistor,

wherein the first circuit further comprises a photoelectric conversion element,

wherein the first transistor is configured to control an output of the first signal in accordance with an output signal from the photoelectric conversion element,

wherein the second circuit comprises a second transistor and a capacitor,

wherein the operation circuit comprises a third transistor,

wherein the operation circuit is electrically connected to one of a source and a drain of the second transistor and one electrode of the capacitor, and

wherein a layer comprising the first transistor is located over a layer comprising the operation circuit, and the photoelectric conversion element is located over the layer comprising the first transistor.

5. The imaging device according to claim 4 , wherein the operation circuit comprises at least a part of a neural network.

Priority Claims (2)
JP 2016-153192 · Aug 3, 2016 · national
JP 2016-153194 · Aug 3, 2016 · national
Continuity (3)
Continuation 16831085 · Mar 26, 2020
Continuation 15661318 · Jul 27, 2017
Related Publication 20230297822A1 · Sep 21, 2023
Cited By (2)
US 12,396,181 US 12,659,621