IP Library › Granted Patent US 12,166,102
Granted Patent B2
US 12,166,102 · App. 17/258,462 · Granted Dec 10, 2024

Semiconductor device and method for manufacturing the same

Inventors: Ronghui Hao (Suzhou, CN); Fu Chen (Suzhou, CN); Chuan He (Suzhou, CN); King Yuen Wong (Suzhou, CN)
Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
H01L29/66462H01L29/2003H01L29/41766H01L29/7786
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Quick Facts
Patent No.
US 12,166,102
App. No.
17/258,462
Granted
Dec 10, 2024
Kind
B2
Abstract

A nitride-based semiconductor device includes a substrate, a buffer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a S/D electrode, a second S/D electrode, and a gate electrode. The buffer is disposed over the substrate and includes at least one layer of a nitride-based semiconductor compound doped with an acceptor at a top-most portion of the buffer. The first and second nitride-based semiconductor layers are disposed over the buffer. The first S/D electrode is disposed over the second nitride-based semiconductor layer, in which the first S/D electrode extends downward to a position lower than the first nitride-based semiconductor layer, so as to form at least one first interface with the top-most portion of the buffer, making contact with the at least one layer of the nitride-based semiconductor compound. The second S/D electrode and the gate electrode are disposed over the second nitride-based semiconductor layer.

Claims (41)

1. A nitride-based semiconductor device, comprising:

a substrate;

a buffer disposed over the substrate and comprising at least one layer of a nitride-based semiconductor compound doped with an acceptor at a top-most portion of the buffer;

a first nitride-based semiconductor layer disposed over the buffer;

a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap greater than a bandgap of the first nitride-based semiconductor layer; and

a first source/drain (S/D) electrode disposed over the second nitride-based semiconductor layer, wherein the first S/D electrode extends downward to a position lower than the first nitride-based semiconductor layer, so as to form at least one first interface with the top-most portion of the buffer, making contact with the at least one layer of the nitride-based semiconductor compound of the buffer;

a second S/D electrode disposed over the second nitride-based semiconductor layer; and

a gate electrode disposed over the second nitride-based semiconductor layer and between the first and second S/D electrodes;

wherein the first S/D electrode has a first portion and a second portion, the first portion has a first bottom surface forming the first interface with the top-most portion of the buffer, and the second portion has a second bottom surface forming at least one second interface with the second nitride-based semiconductor layer;

wherein the first nitride-based semiconductor layer, the second nitride-based semiconductor layer, and the top-most portion of the buffer collectively have at least one recess to receive the first S/D electrode;

the semiconductor device further comprises:

a shield layer disposed between the buffer and the first nitride-based semiconductor layer and comprising a first isolation compound that has a bandgap greater than the bandgap of the first nitride-based semiconductor layer and greater than the bandgap of the second nitride-based semiconductor layer, wherein the first isolation compound is made of at least one two-dimensional material which comprises at least one metal element.

2. The semiconductor device of claim 1 , wherein the first portion of the first S/D electrode has a side surface forming at least one third interface with the top-most portion of the buffer.

3. The semiconductor device of claim 1 , wherein the first portion is located between the second S/D electrode and the second portion.

4. The semiconductor device of claim 1 , wherein the first portion has a third bottom surface that is higher than the first bottom surface and forms at least one third interface with the second nitride-based semiconductor layer.

5. The semiconductor device of claim 1 , wherein the first S/D electrode has at least one downward extending portion in the recess, and an end of the downward extending portion is enclosed by the top-most portion of the buffer.

6. The semiconductor device of claim 1 , wherein the first S/D electrode viewed along a direction normal to the second nitride-based semiconductor layer extends along an extending direction, and the first S/D electrode has a plurality of downward extending portions in a plurality of the recesses, wherein the downward extending portions are arranged along the extending direction and form a plurality of the first interfaces with the top-most portion of the buffer.

7. The semiconductor device of claim 6 , wherein some portions of the first and second nitride-based semiconductor layers are between two of the downward extending portions.

8. The semiconductor device of claim 1 , wherein the recess has at least one sidewall collectively defined by the first nitride-based semiconductor layer, the second nitride-based semiconductor layer, and the top-most portion of the buffer, and the sidewall forms an obtuse angle with respect to the first interface.

9. The semiconductor device of claim 1 , wherein the second S/D electrode has a bottom-most surface in a position higher than the first S/D electrode.

10. The semiconductor device of claim 1 , wherein the buffer has a bottom portion under the top-most portion, and a distinguishable interface exists between the bottom portion and the top-most portion.

11. The semiconductor device of claim 10 , wherein the bottom portion comprises aluminum, and the nitride-based semiconductor compound at the top-most portion is devoid of aluminum.

12. The semiconductor device of claim 11 , wherein the nitride-based semiconductor compound is carbon-doped gallium nitride, and the bottom portion further comprises aluminum gallium nitride.

13. A method for manufacturing a semiconductor device, comprising:

forming a buffer over a substrate, wherein the buffer at least comprises a p-type III-V group semiconductor compound at a top-most portion thereof;

forming a first nitride-based semiconductor layer over the buffer;

forming a second nitride-based semiconductor layer on the first nitride-based semiconductor layer, wherein the second nitride-based semiconductor layer has a bandgap greater than a bandgap of the first nitride-based semiconductor layer;

forming at least one hole in the first and second nitride-based semiconductor layers to expose the top-most portion of the buffer;

forming a first source/drain (S/D) electrode and a second S/D electrode over the second nitride-based semiconductor layer, wherein the second S/D electrode is located within the hole such that the second S/D electrode forms an interface with the exposed top-most portion of the buffer, the first S/D electrode has a first portion and a second portion, the first portion has a first bottom surface forming a first interface with the top-most portion of the buffer, and the second portion has a second bottom surface forming at least one second interface with the second nitride-based semiconductor layer, and the first nitride-based semiconductor layer, the second nitride-based semiconductor layer, and the top-most portion of the buffer collectively have at least one recess to receive the first S/D electrode; and

forming a gate electrode over the second nitride-based semiconductor layer and between the first and second S/D electrodes;

forming a shield layer disposed between the buffer and the first nitride-based semiconductor layer and comprising a first isolation compound that has a bandgap greater than the bandgap of the first nitride-based semiconductor layer and greater than the bandgap of the second nitride-based semiconductor layer, wherein the first isolation compound is made of at least one two-dimensional material which comprises at least one metal element.

14. The method of claim 13 , further comprising:

removing a portion of the first nitride-based semiconductor layer and a portion of the second nitride-based semiconductor layer to form the hole.

15. The method of claim 14 , further comprising:

removing a portion of the top-most portion of the buffer to form a recess under the hole.

16. The method of claim 13 , further comprising:

forming a passivation layer on the second nitride-based semiconductor layer prior to forming at least one hole;

forming a mask on the passivation layer, wherein a portion of the second nitride-based semiconductor layer is exposed from the mask layer; and

removing the exposed portion of the second nitride-based semiconductor layer to form the hole.

17. The method of claim 16 , further comprising:

forming a gate structure after the formation of the second S/D electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2021
From: HAO, RONGHUI; CHEN, FU; HE, CHUAN; WONG, KING YUEN
To: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
Reel/Frame 054911/0922 →
Continuity (1)
Related Publication 20220376084A1 · Nov 24, 2022