IP Library › Granted Patent US 12,174,245
Granted Patent B2
US 12,174,245 · App. 17/634,809 · Granted Dec 24, 2024

Recipe information presentation system and recipe error inference system

Inventors: Kouichi Hayakawa (Tokyo, JP); Masami Takano (Tokyo, JP); Kazuhiro Ueda (Tokyo, JP); Masayoshi Ishikawa (Tokyo, JP); Yasuhiro Yoshida (Tokyo, JP)
Assignee: Hitachi High-Tech Corporation
G01R31/2846H01L22/12
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Quick Facts
Patent No.
US 12,174,245
App. No.
17/634,809
Granted
Dec 24, 2024
Kind
B2
Abstract

An objective of the present invention is to provide a system which can infer the cause of a recipe error and present a correction candidate for the recipe error. A recipe information presentation system or recipe error inference system according to the present invention: causes a learner to learn a correspondence between a recipe and an error originating from the recipe; and acquires from the learner an inference result as to whether the error occurs when a new recipe is used (refer to FIG. 1 ).

Claims (62)

1. A system which presents a recipe defining an inspection operation executed by a semiconductor inspection apparatus or information related to the recipe, the system comprising:

the semiconductor inspection apparatus; and

a computer system which infers the recipe which becomes a cause of an error which occurs in the semiconductor inspection apparatus,

wherein the computer system includes a learner which learns, by machine learning, a correspondence between the recipe used when the semiconductor inspection apparatus executes the inspection operation and the error which originates from the recipe,

wherein the computer system introduces a new recipe into the learner after the learner completes the machine learning, and acquires, as the output of the learner, an inference result as to whether the error occurs when the semiconductor inspection apparatus uses the new recipe,

wherein when acquiring, from the learner, the inference result indicating that the error occurs by the new recipe, the computer system repeats correction of the new recipe and re-introduction of a corrected new recipe into the learner until the inference result indicating that the error does not occur is acquired, and

wherein the computer system presents that the recipe or the information related to the recipe acquired by the repetition is to be used by the semiconductor inspection apparatus.

2. The system according to claim 1 ,

wherein the recipe describes one or more recipe parameters which define the inspection operation,

wherein the learner learns a correspondence between the combination of the recipe parameters that the semiconductor inspection apparatus uses when the error occurs and an error parameter which describes the content of the error, and

wherein the computer system introduces the recipe parameter described by the new recipe into the learner to acquire, as the inference result, the error parameter corresponding to the recipe parameter.

3. The system according to claim 2 ,

wherein the recipe describes, as the parameter defining the inspection operation, at least any one of a coordinate map on a semiconductor wafer inspected by the semiconductor inspection apparatus, an alignment parameter used for aligning the coordinate system of the semiconductor wafer and the coordinate system of the semiconductor inspection apparatus, an addressing parameter used for aligning a position inspected by the semiconductor inspection apparatus with an inspection position on the semiconductor wafer, and a length measurement parameter used for designating a portion whose length is to be measured, of a pattern formed on the semiconductor wafer at the inspection position.

4. The system according to claim 2 ,

wherein the error parameter describes, together with the content of the error, at least any one of a length measurement result describing a result by which the length of the pattern formed on the semiconductor wafer inspected by the semiconductor inspection apparatus is identified, an observation image acquired by observing the semiconductor wafer by the semiconductor inspection apparatus, and the operation log of the semiconductor inspection apparatus.

5. The system according to claim 1 ,

wherein the recipe describes one or more recipe parameters which define the inspection operation,

wherein the computer system includes a recipe correction proposition unit which executes the repetition to present a correction proposal with respect to the recipe in which the error occurs, and

wherein the recipe correction proposition unit presents, as the correction proposal, the recipe parameter to be used by the semiconductor inspection apparatus as a correction candidate parameter, and presents the correction amount of the correction candidate parameter.

6. The system according to claim 5 ,

wherein the learner further includes an analyzer which calculates the contribution degree of the recipe parameter with respect to the error, and

wherein the recipe correction proposition unit identifies the correction candidate parameter from among the recipe parameters according to the contribution degree.

7. The system according to claim 5 ,

wherein the computer system further includes a correction amount calculation unit which calculates the correction amount,

wherein the correction amount calculation unit acquires the value distribution or statistical value of a normal recipe parameter in a past normal recipe in which the error has not occurred, and

wherein the correction amount calculation unit calculates the correction amount according to a difference between the correction candidate parameter and the value distribution or statistical value of the normal recipe parameter corresponding to the correction candidate parameter in the normal recipe.

8. The system according to claim 1 ,

wherein the computer system acquires apparatus data which describes a state parameter representing the state of the semiconductor inspection apparatus,

wherein the learner learns, by the machine learning, a correspondence between the recipe, the state parameter, and the error parameter which describes the content of the error, and

wherein the computer system introduces the state parameter into the learner together with the new recipe after the learner completes the machine learning, and acquires, as the output of the learner, the inference result as to whether the error occurs when the semiconductor inspection apparatus uses the new recipe and the semiconductor inspection apparatus is in a state represented by the state parameter.

9. The system according to claim 8 ,

wherein the semiconductor inspection apparatus includes a first inspection apparatus and a second inspection apparatus,

wherein the computer system acquires, as the state parameter, a first apparatus parameter representing the state of the first inspection apparatus, and a second apparatus parameter representing the state of the second inspection apparatus,

wherein the learner learns, by the machine learning, a correspondence between the recipe, the first apparatus parameter, the second apparatus parameter, and the error, and

wherein the learner infers whether the error originates from at least any one of the first apparatus parameter and the second apparatus parameter, according to a difference between the first apparatus parameter and the second apparatus parameter.

10. The system according to claim 8 ,

wherein the apparatus data describes, as the state parameter, at least any one of a apparatus inherent parameter describing an operation correction parameter for operating the semiconductor inspection apparatus according to defining specifications, an apparatus-to-apparatus difference correction parameter describing an operation correction parameter for correcting an apparatus-to-apparatus difference between the semiconductor inspection apparatuses, and an observation condition parameter describing an observation condition by the semiconductor inspection apparatus.

11. The system according to claim 1 ,

wherein the learner identifies each of a point in time when the error occurs and a point in time when the error does not occur by using the same recipe or a similar recipe group in the chronological history of the correspondence learned by the machine learning, and infers whether the error originates from the state of an inspection target of the semiconductor inspection apparatus.

12. The system according to claim 1 ,

wherein the semiconductor inspection apparatus includes a first inspection apparatus and a second inspection apparatus, and

wherein the learner infers whether the error originates from the recipe, according to whether the error occurs in each of the first inspection apparatus and the second inspection apparatus by using the same recipe or the similar recipe group.

13. The system according to claim 1 ,

wherein the computer system further includes a re-learning execution unit which causes the learner to re-execute the machine learning after the machine learning is completed,

wherein the re-learning execution unit acquires a new correspondence between a new recipe and a new error after the machine learning is completed, and inputs the new correspondence to the learner to cause the learner to re-execute the machine learning, and

wherein when a difference between a learning data model describing the result of the machine learning and a re-learning data model describing the result of the re-execution is a determination threshold value or more, the re-learning execution unit replaces the learning data model with the re-learning data model.

14. The system according to claim 1 ,

wherein the computer system further includes a user interface which presents, together with the content of the error, the parameter representing the state of the semiconductor inspection apparatus when the error occurs in the semiconductor inspection apparatus.

15. The system according to claim 14 ,

wherein the computer system further presents the recipe or the information related to the recipe to the user interface.

16. The system according to claim 1 ,

wherein the computer system further includes a user interface which presents, together with the chronological error state of the error, the content of the error in the semiconductor inspection apparatus.

17. The system according to claim 1 ,

wherein the computer system further includes a user interface which presents, together with an execution result at the time of executing the recipe, the content of the recipe in the semiconductor inspection apparatus.

18. The system according to claim 1 ,

wherein the computer system further includes a user interface which can present a result by which the recipe is corrected in the semiconductor inspection apparatus, to confirm the effect of the correction recipe.

19. A system which infers, among recipes defining an inspection operation executed by a semiconductor inspection apparatus, a recipe that becomes a cause of an error which occurs in the semiconductor inspection apparatus, the system comprising:

the semiconductor inspection apparatus; and

a computer system which infers the recipe which becomes the cause of the error,

wherein the computer system includes a learner which learns, by machine learning, a correspondence between the recipe used for executing the inspection operation by the semiconductor inspection apparatus and the error which originates from the recipe,

wherein the computer system introduces a new recipe into the learner after the learner completes the machine learning to acquire, as the output of the learner, an inference result as to whether the error occurs when the semiconductor inspection apparatus uses the new recipe, and infers the recipe that becomes the cause of the error on the basis of the inference result, and

wherein when acquiring, from the learner, the inference result indicating that the error occurs by the new recipe, the computer system repeats correction of the new recipe and re-introduction of a corrected new recipe into the learner until the inference result indicating that the error does not occur is acquired.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2022
From: HAYAKAWA, KOUICHI; TAKANO, MASAMI; UEDA, KAZUHIRO; ISHIKAWA, MASAYOSHI; YOSHIDA, YASUHIRO
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 058999/0913 →
Continuity (1)
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