Semiconductor device and semiconductor system including semiconductor device
A semiconductor device including at least one inversion channel region includes an oxide semiconductor film containing a crystal that has a corundum structure at the inversion channel region.
1. A semiconductor device comprising:
a first electrode;
a second electrode;
a gate electrode;
an inversion channel region; and
an oxide semiconductor film comprising a crystal that has a corundum structure,
the inversion channel region being only in the oxide semiconductor film,
wherein when a voltage is applied to the gate electrode, a conductivity type of the inversion channel region is inverted and electrons flow from the first electrode to the second electrode, and
wherein the crystal is a p-type semiconductor.
2. The semiconductor device according to claim 1 ,
wherein the crystal is a mixed crystal.
3. The semiconductor device according to claim 1 , further comprising:
an oxide film that is arranged in contact with the inversion channel region.
4. The semiconductor device according to claim 3 ,
wherein the oxide film comprises at least one element selected from elements of Group 15 in the periodic table.
5. The semiconductor device according to claim 4 ,
wherein the at least one element is phosphorus.
6. The semiconductor device according to claim 4 ,
wherein the oxide film further comprises at least one element selected from elements of Group 13 in the periodic table.
7. The semiconductor device according to claim 1 ,
wherein the crystal comprises gallium oxide as a major component.
8. The semiconductor device according to claim 1 , further comprising:
a first semiconductor region; and
a second semiconductor region,
the inversion channel region being positioned between the first semiconductor region and the second semiconductor region in plan view.
9. The semiconductor device according to claim 8 ,
wherein the first semiconductor region is an n-type semiconductor region and the second semiconductor region is an n-type semiconductor region.
10. The semiconductor device according to claim 9 , further comprising:
a third semiconductor region,
the third semiconductor region being positioned between the inversion channel region and the second semiconductor region in plan view.
11. The semiconductor device according to claim 10 ,
wherein the third semiconductor region is an n − -type semiconductor region.
12. The semiconductor device according to claim 8 , further comprising:
a first electrode electrically connected to the first semiconductor region; and
a second electrode electrically connected to the second semiconductor region.
13. The semiconductor device according to claim 12 ,
wherein the first semiconductor region is an n-type semiconductor region and the second semiconductor region is an n-type semiconductor region.
14. The semiconductor device according to claim 12 , further comprising:
a third semiconductor region,
the third semiconductor region being positioned between the inversion channel region and the second semiconductor region in plan view.
15. The semiconductor device according to claim 1 ,
wherein the semiconductor device is a MOSFET.
16. A semiconductor system comprising:
the semiconductor device according to claim 1 .
17. A semiconductor device comprising:
a first electrode;
a second electrode;
a gate electrode;
an n-type semiconductor layer; and
an oxide semiconductor film comprising a crystal that has a corundum structure and an inversion channel region, the oxide semiconductor film arranged on the n-type semiconductor layer,
wherein when a voltage is applied to the gate electrode, a conductivity type of the inversion channel region is inverted and electrons flow from the first electrode to the second electrode, and
wherein the crystal is a p-type semiconductor.
18. The semiconductor device according to claim 17 ,
wherein the crystal comprises a p-type dopant.
19. The semiconductor device according to claim 17 , further comprising:
a first semiconductor region with an upper surface; and
a second semiconductor region with an upper surface,
the upper surface of the first semiconductor region and the upper surface of the second semiconductor region being flush with an upper surface of the inversion channel region.
20. The semiconductor device according to claim 19 ,
wherein the semiconductor device is a power device.
21. The semiconductor device according to claim 19 , further comprising:
a first electrode electrically connected to the first semiconductor region; and
a second electrode electrically connected to the second semiconductor region.
22. The semiconductor device according to claim 17 ,
wherein the semiconductor device is a power device.
23. The semiconductor device according to claim 17 ,
wherein the crystal is a mixed crystal.
24. The semiconductor device according to claim 17 , further comprising:
an oxide film that is arranged in contact with the inversion channel region.
25. The semiconductor device according to claim 24 ,
wherein the oxide film comprises at least one element selected from elements of Group 15 in the periodic table, and the at least one element is phosphorus.
26. A semiconductor device comprising:
a first electrode;
a second electrode;
a gate electrode;
an inversion channel region,
the inversion channel region comprising a crystal that has a corundum structure,
wherein when a voltage is applied to the gate electrode, a conductivity type of the inversion channel region is inverted and electrons flow from the first electrode to the second electrode, and
wherein the crystal includes a p-type dopant.
27. A semiconductor device comprising:
a first electrode;
a second electrode;
a gate electrode;
an inversion channel region; and
an oxide semiconductor film comprising a crystal that has a corundum structure at the inversion channel region,
wherein when a voltage is applied to the gate electrode, a conductivity type of the inversion channel region is inverted and electrons flow from the first electrode to the second electrode, and
wherein the crystal includes a p-type dopant.