IP Library › Granted Patent US 12,183,754
Granted Patent B2
US 12,183,754 · App. 17/410,025 · Granted Dec 31, 2024

Single-photon avalanche diodes with deep trench isolation

Inventors: Ping Zheng (Singapore, SG); Eng Huat Toh (Singapore, SG); Eric Linardy (Singapore, SG); Kiok Boone Elgin Quek (Singapore, SG)
Assignee: GlobalFoundries Singapore Pte. Ltd.
H01L27/1463H01L27/14603H01L27/14623H01L27/1464H01L27/14685H01L27/14627H01L31/107
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Quick Facts
Patent No.
US 12,183,754
App. No.
17/410,025
Granted
Dec 31, 2024
Kind
B2
Abstract

Structures for a single-photon avalanche diode and methods of forming a structure for a single-photon avalanche diode. The structure includes a semiconductor layer having a first well and a second well defining a p-n junction with the first well, and an interlayer dielectric layer on the semiconductor layer. A deep trench isolation region includes a conductor layer and a dielectric liner. The conductor layer penetrates through the semiconductor layer and the interlayer dielectric layer. The conductor layer has a first end, a second end, and a sidewall that connects the first end to the second end. The dielectric liner is arranged to surround the sidewall of the conductor layer. A metal feature is connected to the first end of the conductor layer.

Claims (17)

1. A structure for a single-photon avalanche detector, the structure comprising:

a plurality of semiconductor layers including a first well, a second well defining a p-n junction with the first well, a first surface, and a second surface opposite from the first surface;

a micro-lens adjacent to the second surface of the semiconductor layers;

an interlayer dielectric layer on the first surface of the semiconductor layers;

a deep trench isolation region including a conductor layer and a dielectric liner, the conductor layer including a first portion in the semiconductor layers and a second portion in the interlayer dielectric layer, the conductor layer having a first end, a second end opposite from the first end, and a sidewall that connects the first end to the second end, the second end of the conductor layer coplanar with the second surface of the semiconductor layers, and the dielectric liner arranged to surround the sidewall of the conductor layer; and

a metal feature directly connected to the first end of the conductor layer,

wherein the second surface of the semiconductor layers is free of metal.

2. The structure of claim 1 wherein the metal feature is a first wire, and the second portion of the conductor layer is connected at the first end to the first wire.

3. The structure of claim 2 further comprising:

a contact in the interlayer dielectric layer; and

a second wire connected by the contact to the first well.

4. The structure of claim 1 wherein the second end of the conductor layer is free of the dielectric liner.

5. The structure of claim 1 wherein the semiconductor layers have a conductivity type, and at least one of the semiconductor layers has a higher dopant concentration than another of the semiconductor layers.

6. The structure of claim 1 wherein the semiconductor layers include a trench, the conductor layer and the dielectric liner are positioned in the trench, and further comprising:

a doped semiconductor layer inside the trench,

wherein the doped semiconductor layer defines a pinning layer that is positioned between the dielectric liner and the semiconductor layers surrounding the trench, and the metal feature is directly connected to the doped semiconductor layer.

7. The structure of claim 6 wherein the dielectric liner is positioned between the doped semiconductor layer and the sidewall of the conductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2021
From: ZHENG, PING; TOH, ENG HUAT; LINARDY, ERIC; QUEK, KIOK BOONE ELGIN
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 057268/0647 →
Continuity (1)
Related Publication 20230065063A1 · Mar 2, 2023