IP Library › Granted Patent US 12,189,468
Granted Patent B2
US 12,189,468 · App. 17/332,302 · Granted Jan 7, 2025

Cloud scale server reliability management

Inventors: Theodros Yigzaw (Sherwood, OR); John Holm (Beaverton, OR); Subhankar Panda (Portland, OR); Hugo Enrique Gonzalez Chavero (Tlaquepaque, MX); Satyaprakash Nanda (Portland, OR); Omar Avelar Suarez (Zapopan, MX); Guarav Porwal (Portland, OR)
Assignee: Intel Corporation
G06F11/0793G06F11/0751G06F11/0772
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Quick Facts
Patent No.
US 12,189,468
App. No.
17/332,302
Granted
Jan 7, 2025
Kind
B2
Abstract

An embodiment of an electronic apparatus may comprise one or more substrates, and a controller coupled to the one or more substrates, the controller including circuitry to provide management of a connected hardware subsystem with respect to one or more of reliability, availability and serviceability, and coordinate the management of the connected hardware subsystem with respect to one or more of reliability, availability and serviceability between the connected hardware subsystem and a host. Other embodiments are disclosed and claimed.

Claims (47)

1. An electronic apparatus, comprising:

one or more substrates; and

a controller coupled to the one or more substrates, the controller including circuitry which is configured to execute firmware instructions to coordinate a management of a memory subsystem with an operating system (OS) which is to be executed with a host processor of a platform which is to comprise the controller and the memory subsystem, wherein the circuitry to coordinate the management comprises the circuitry to:

proactively provide to the OS a notification of a failure event at the memory subsystem;

receive a communication from the OS which indicates that, based on the notification, the OS is to temporarily map out a page of the memory subsystem which is related to the failure event;

in response to the communication:

release the page of the memory subsystem; and

initiate a self-repair action for the page; and

report to the OS a status of the self-repair action;

wherein the OS is to determine, based on the status, whether the page is to be reclaimed.

2. The electronic apparatus of claim 1 , wherein the notification is to comprise a flag value which is to identify the failure event as being temporary.

3. The electronic apparatus of claim 2 , wherein the self-repair action is to comprise a run time post package repair action.

4. The electronic apparatus of claim 3 , wherein the circuitry is to:

notify the OS that the released page is available to be reclaimed if the self-repair action is successful.

5. The electronic apparatus of claim 3 , wherein the circuitry is to:

notify the OS that the failure event is a permanent failure event if the self-repair action is unsuccessful.

6. An electronic system, comprising:

a controller; and

memory communicatively coupled to the controller, wherein the memory stores firmware instructions that when executed by the controller cause the controller to coordinate a management of a memory subsystem with an operating system (OS) which is to be executed with a host processor of a platform which is to comprise the controller and the memory subsystem, wherein the controller to coordinate the management comprises the controller to:

proactively provide to the OS a notification of a failure event at the memory subsystem;

receive a communication from the OS which indicates that, based on the notification, the OS is to temporarily map out a page of the memory subsystem which is related to the failure event;

in response to the communication:

release the page of the memory subsystem; and

initiate a self-repair action for the page; and

report to the OS a status of the self-repair action;

wherein the OS is to determine, based on the status, whether the page is to be reclaimed.

7. The electronic system of claim 6 , wherein the notification is to comprise a flag value which is to identify the failure event as being temporary.

8. The electronic system of claim 7 , wherein the self-repair action is to comprise a run time post package repair action.

9. The electronic system of claim 8 , wherein the controller is to:

notify the OS that the released page is available to be reclaimed if the self-repair action is successful.

10. The electronic system of claim 8 , wherein the controller is to:

notify the OS that the failure event is a permanent failure event if the self-repair action is unsuccessful.

11. A method of managing a subsystem, the method comprising:

providing a management of a memory subsystem with respect to one or more of reliability, availability and serviceability; and

with controller circuitry, executing firmware instructions to coordinate the management of the memory subsystem with an operating system (OS) which is executed with a host processor of a platform which comprises the controller circuitry and the memory subsystem, wherein coordinating the management comprises the controller circuitry:

proactively providing to the OS a notification of a failure event at the memory subsystem;

receiving a communication from the OS which indicates that, based on the notification, the OS is to temporarily map out a page of the memory subsystem which is related to the failure event;

in response to the communication:

releasing the page of the memory subsystem; and

initiating a self-repair action for the page; and

reporting to the OS a status of the self-repair action;

wherein the OS determines, based on the status, whether the page is to be reclaimed.

12. The method of claim 11 , wherein the notification comprises a flag value which identifies the failure event as being temporary.

13. The method of claim 12 , wherein the self-repair action comprises a run time post package repair action.

14. The method of claim 13 , wherein:

the OS is notified that the released page is available to be reclaimed if the self-repair action is successful; and

the OS is notified that the failure event is a permanent failure event if the self-repair action is unsuccessful.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2021
From: YIGZAW, THEODROS; HOLM, JOHN; PANDA, SUBHANKAR; GONZALEZ CHAVERO, HUGO ENRIQUE; NANDA, SATYAPRAKASH; SUAREZ, OMAR AVELAR; PORWAL, GAURAV
To: INTEL CORPORATION
Reel/Frame 056374/0426 →
Continuity (1)
Related Publication 20210286667A1 · Sep 16, 2021
References Cited (4)
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US 20060010352A1 · Mukherjee · 2006 [cited by examiner]
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