IP Library Granted Patent US 12,189,512
Granted Patent B2
US 12,189,512 · App. 16/829,935 · Granted Jan 7, 2025

Performance monitoring for short-lived functions

Inventors: Francesc Guim Bernat (Barcelona, ES); Steven Briscoe (Munich, DE); Karthik Kumar (Chandler, AZ); Alexander Bachmutsky (Sunnyvale, CA); Timothy Verrall (Pleasant Hill, CA)
Assignee: Intel Corporation
G06F11/3495G06F11/3419H04L43/08
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Quick Facts
Patent No.
US 12,189,512
App. No.
16/829,935
Filed
Mar 25, 2020
Granted
Jan 7, 2025
Kind
B2
Art Unit
2449
USPC
709/224
Abstract

Examples described herein relate to an apparatus that includes a memory and at least one processor where the at least one processor is to receive configuration to gather performance data for a function from one or more platforms and during execution of the function, collect performance data for the function and store the performance data after termination of execution of the function. Some examples include an interface coupled to the at least one processor and the interface is to receive one or more of: an identifier of a function, resources to be tracked as part of function execution, list of devices to be tracked as part of function execution, type of monitoring of function execution, or meta-data to identify when the function is complete. Performance data can be accessed to determine performance of multiple executions of the short-lived function.

Claims (36)

1. An apparatus comprising:

a memory;

at least one processor coupled to the memory; and

an interface coupled to the at least one processor, wherein

the at least one processor is to:

receive a configuration to gather performance data for at least two different serverless computing applications from one or more platforms, wherein the performance data comprises performance data from start to finish of execution of at least one of the at least two different serverless computing applications; and

collect performance data from the one or more platforms during execution of the at least two different serverless computing applications and store the performance data; and

the interface is to receive meta-data to identify when execution of a serverless computing application of the at least two different serverless computing applications has finished execution, wherein the meta-data comprises one or more of: a particular event, last line of code, or application termination.

2. The apparatus of claim 1 , wherein the interface is to receive one or more of: an identifier of a serverless computing application, resources to be tracked as part of application execution, a list of devices to be tracked as part of execution of the serverless computing application, or a type of monitoring of execution of the serverless computing application.

3. The apparatus of claim 2 , wherein the identifier of the serverless computing application comprises a combination of one or more of: an identifier for a tenant, Process Address Space ID (PASID) for an application calling or requesting execution of the serverless computing application, or an identifier of an application.

4. The apparatus of claim 2 , wherein the identifier of the serverless computing application is unique for every execution of the serverless computing application.

5. The apparatus of claim 2 , wherein the list of devices to be tracked as part of the execution of the serverless computing application comprises at least one device identifier.

6. The apparatus of claim 2 , wherein the type of monitoring of application execution comprises one or more of: metrics to track or frequency of metric sampling.

7. The apparatus of claim 6 , wherein the metrics to track comprise one or more of: memory bandwidth utilization, memory size usage, memory allocation, core clock frequency speed, core clock cycle utilization, networking bandwidth used, core idle measurement, core execution of user space processes, core waiting for an input/output operation to complete, cache utilization, network interface bandwidth utilization, central processing unit (CPU) cycle utilization, graphics processing unit (GPU) cycle utilization, database transactions/second, collectd telemetry, performance monitoring unit (PMU) counters, performance monitoring counters (PMON), or performance counter monitor.

8. The apparatus of claim 2 , wherein the at least one processor is to store the performance data from the one or more platforms into storage after termination of execution of the at least two different serverless computing applications.

9. The apparatus of claim 8 , wherein the at least one processor is to provide access to the performance data from the storage to one or more selected requesters.

10. The apparatus of claim 1 , comprising resources, the resources comprising one or more of: a single or multi-core processor, a graphics processing unit, a logical execution unit, a single or multi-level cache, functional units usable to independently execute programs or threads, application specific integrated circuits (ASICs), neural network processors (NNPs), programmable control logic, field programmable gate arrays (FPGAs), or programmable logic controllers (PLCs).

11. The apparatus of claim 1 , comprising one or more of: a server, data center, rack, or network interface.

12. A computer-implemented method comprising:

monitoring performance data from start to finish of execution of at least two different serverless functions on resources of one or more platforms and making the performance data available to a requester; and

providing meta-data to identify when execution of a serverless function of the at least two different serverless functions is complete, wherein the meta-data comprises one or more of: a particular event, last line of code, or application termination.

13. The method of claim 12 , wherein the at least two different serverless functions comprise serverless functions that perform different operations, or are a same function but performed at different times or process different data.

14. The method of claim 12 , wherein the serverless function of the at least two different serverless functions executes on resources shared with one or more other functions.

15. The method of claim 12 , comprising:

associating an identifier with at least one execution of the serverless function of the at least two different serverless functions and specifying resources to monitor during the at least one execution of the serverless function of the at least two different serverless functions.

16. The method of claim 12 , comprising:

gathering performance data from the one or more platforms during different executions of the serverless function of the at least two different serverless functions and

making the performance data available for access to selected requesters, wherein the performance data excludes resource usage data during pause or halt of the at least two different serverless functions.

17. At least one non-transitory computer-readable medium comprising instructions stored thereon that if executed by at least one processor, cause the at least one processor to:

request execution of a short-lived serverless function;

provide an identifier for at least one execution of the short-lived serverless function;

specify resources to monitor and metrics to store from the at least one execution of the short-lived serverless function;

access performance data collected from start to finish of execution of at least two different short-lived serverless functions; and

receive meta-data to identify when execution of the at least one execution of the short-lived serverless function has finished execution, wherein the meta-data comprises one or more of: a particular event, last line of code, or application termination.

18. The computer-readable medium of claim 17 , wherein the resources comprise one or more of: a single or multi-core processor, a graphics processing unit, a logical execution unit, a single or multi-level cache, functional units usable to independently execute programs or threads, application specific integrated circuits (ASICs), neural network processors (NNPs), programmable control logic, field programmable gate arrays (FPGAs), or programmable logic controllers (PLCs).

19. The computer-readable medium of claim 17 , wherein the metrics comprise one or more of: memory bandwidth utilization, memory size usage, memory allocation, core clock frequency speed, core clock cycle utilization, networking bandwidth used, core idle measurement, core execution of user space processes, core waiting for an input/output operation to complete, cache utilization, network interface bandwidth utilization, central processing unit (CPU) cycle utilization, graphics processing unit (GPU) cycle utilization, database transactions/second, collectd telemetry, performance monitoring unit (PMU) counters, performance monitoring counters (PMON), or performance counter monitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2020
From: GUIM BERNAT, FRANCESC; BRISCOE, STEVEN; KUMAR, KARTHIK; BACHMUTSKY, ALEXANDER; VERRALL, TIMOTHY
To: INTEL CORPORATION
Reel/Frame 052238/0901 →
Continuity (1)
Related Publication 20200241999A1 · Jul 30, 2020
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