IP Library › Granted Patent US 12,191,360
Granted Patent B2
US 12,191,360 · App. 17/562,938 · Granted Jan 7, 2025

Methods for silicon carbide gate formation

Inventors: Yi Zheng (Sunnyvale, CA); Er-Xuan Ping (Santa Clara, CA)
Assignee: APPLIED MATERIALS, INC.
H01L29/401H01L21/049H01L29/1608H01L29/4236
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Quick Facts
Patent No.
US 12,191,360
App. No.
17/562,938
Granted
Jan 7, 2025
Kind
B2
Abstract

A method of forming a gate structure on a substrate with increased charge mobility. In some embodiments, the method may include depositing an amorphous carbon layer on a silicon carbide layer on the substrate to form a capping layer on the silicon carbide layer, annealing the silicon carbide layer at a temperature of greater than approximately 1800 degrees Celsius, forming a hard mask on the silicon carbide layer by patterning the amorphous carbon layer, etching a trench structure of the gate structure into the silicon carbide layer using the hard mask, removing the hard mask to expose the silicon carbide layer, depositing a silicon dioxide layer on the silicon carbide layer using an ALD process, performing at least one interface treatment on the silicon dioxide layer, depositing a gate oxide layer of the gate structure on the silicon dioxide layer, and depositing a gate material on the gate oxide layer.

Claims (66)

1. A method of forming a gate structure on a substrate, comprising:

depositing an amorphous carbon layer on a silicon carbide layer of the gate structure on the substrate to form a capping layer on the silicon carbide layer;

annealing the silicon carbide layer at a temperature of greater than approximately 1800 degrees Celsius;

forming a hard mask on the silicon carbide layer by patterning the amorphous carbon layer;

etching a trench structure of the gate structure into the silicon carbide layer using the hard mask;

removing the hard mask to expose the silicon carbide layer;

depositing a silicon dioxide layer of the gate structure on the silicon carbide layer using an atomic layer deposition process;

performing at least one interface treatment on the silicon dioxide layer;

depositing a gate oxide layer of the gate structure on the silicon dioxide layer; and

depositing a gate material of the gate structure on the gate oxide layer.

2. The method of claim 1 , further comprising:

annealing the silicon carbide layer at a temperature of greater than approximately 2000 degrees Celsius.

3. The method of claim 1 , further comprising:

etching the trench structure into the silicon carbide layer using a selective etch process with a higher etch rate of silicon carbide than amorphous carbon.

4. The method of claim 1 , further comprising:

annealing the silicon carbide layer after depositing the amorphous carbon layer to diffuse dopants into the silicon carbide layer.

5. The method of claim 1 , further comprising:

annealing the silicon carbide layer after depositing the amorphous carbon layer to remove defects in the silicon carbide layer.

6. The method of claim 1 , further comprising:

patterning the amorphous carbon layer by spin coating a photoresist layer on the amorphous carbon layer, exposing the photoresist layer to a light source, and removing areas of the amorphous carbon layer where at least one trench structure is to be formed.

7. The method of claim 1 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process at a temperature of approximately 100 degrees Celsius to approximately 600 degrees Celsius.

8. The method of claim 1 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process to a thickness of approximately 1 nm to approximately 100 nm.

9. The method of claim 1 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process with a gas precursor gas of SiCl 4 , NH 3 and H 2 O, bis(t-butylamino) silane (BTBAS), bis(diethylamino) silane (BDEAS), trisilylamine (TSA), or diisopropylamino silane (DIPAS).

10. The method of claim 1 , further comprising:

performing at least one interface treatment on the silicon dioxide layer including high temperature, oxygen/nitrogen radical treatment, or an additional oxide deposition.

11. A method of forming a gate structure on a substrate, comprising:

depositing an amorphous carbon layer on a silicon carbide layer of the gate structure on the substrate to form a capping layer on the silicon carbide layer;

annealing the silicon carbide layer at a temperature of greater than approximately 1800 degrees Celsius;

forming a hard mask on the silicon carbide layer by patterning the amorphous carbon layer with a photoresist layer;

selectively etching a trench structure of the gate structure into the silicon carbide layer using the hard mask with an etch process having a higher etch rate of silicon carbide over amorphous carbon;

removing the hard mask to expose the silicon carbide layer;

depositing a silicon dioxide layer of the gate structure on the silicon carbide layer using an atomic layer deposition process at a process temperature of approximately 100 degrees Celsius to approximately 600 degrees Celsius;

performing at least one interface treatment on the silicon dioxide layer including high temperature, oxygen/nitrogen radical treatment, or an additional oxide deposition;

depositing a gate oxide layer of the gate structure on the silicon dioxide layer; and

depositing a gate material of the gate structure on the gate oxide layer.

12. The method of claim 11 , further comprising:

annealing the silicon carbide layer at a temperature of greater than approximately 2000 degrees Celsius.

13. The method of claim 11 , further comprising:

annealing the silicon carbide layer after depositing the amorphous carbon layer to diffuse dopants into the silicon carbide layer.

14. The method of claim 11 , further comprising:

annealing the silicon carbide layer after depositing the amorphous carbon layer to remove defects in the silicon carbide layer.

15. The method of claim 11 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process to a thickness of approximately 1 nm to approximately 100 nm.

16. The method of claim 11 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process with a gas precursor gas of SiCl 4 , NH 3 and H 2 O, bis(t-butylamino) silane (BTBAS), bis(diethylamino) silane (BDEAS), trisilylamine (TSA), or diisopropylamino silane (DIPAS).

17. A non-transitory, computer readable medium having instructions stored thereon that, when executed, cause a method for forming a gate structure on a substrate to be performed, the method comprising:

depositing an amorphous carbon layer on a silicon carbide layer of the gate structure on the substrate to form a capping layer on the silicon carbide layer;

annealing the silicon carbide layer at a temperature of greater than approximately 1800 degrees Celsius;

forming a hard mask on the silicon carbide layer by patterning the amorphous carbon layer;

etching a trench structure of the gate structure into the silicon carbide layer using the hard mask;

removing the hard mask to expose the silicon carbide layer;

depositing a silicon dioxide layer of the gate structure on the silicon carbide layer using an atomic layer deposition process;

performing at least one interface treatment on the silicon dioxide layer;

depositing a gate oxide layer of the gate structure on the silicon dioxide layer; and

depositing a gate material of the gate structure on the gate oxide layer.

18. The non-transitory, computer readable medium of claim 17 , further comprising:

annealing the silicon carbide layer at a temperature of greater than approximately 2000 degrees Celsius.

19. The non-transitory, computer readable medium of claim 17 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process at a temperature of approximately 100 degrees Celsius to approximately 600 degrees Celsius; or

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process to a thickness of approximately 1 nm to approximately 100 nm.

20. The non-transitory, computer readable medium of claim 17 , further comprising:

depositing the silicon dioxide layer on the silicon carbide layer using the atomic layer deposition process with a gas precursor gas of SiCl 4 , NH 3 and H 2 O, bis(t-butylamino) silane (BTBAS), bis(diethylamino)silane (BDEAS), trisilylamine (TSA), or diisopropylamino silane (DIPAS); or

performing at least one interface treatment on the silicon dioxide layer including high temperature, oxygen/nitrogen radical treatment, or an additional oxide deposition.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2022
From: ZHENG, YI; PING, ER-XUAN
To: APPLIED MATERIALS, INC.
Reel/Frame 058582/0151 →
Continuity (1)
Related Publication 20230207638A1 · Jun 29, 2023
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