Antenna structure and method for signal calibration
An antenna structure includes a first antenna, a second antenna, at least one processor, a power distribution circuit configured to equally supply power supplied from the processor(s) to the first antenna and the second antenna, and a coupler disposed between the processor(s) and the power distribution circuit, wherein the processor(s) may obtain a first parameter for a first signal received by the first antenna and a second parameter for a second signal received by the second antenna, detect a phase difference between the first signal and the second signal, obtain a matching parameter based on parameters corresponding to a case in which the phase difference satisfies a specified condition among the first parameter and the second parameter, and obtain a third parameter for allowing a reflection coefficient of a signal flowing from the power distribution circuit to the coupler to exist within a specified range among the matching parameters.
1. An antenna structure comprising:
a first antenna;
a second antenna;
at least one processor;
a power distribution circuit configured to equally supply power supplied from the at least one processor to the first antenna and the second antenna; and
a coupler disposed between the at least one processor and the power distribution circuit,
wherein the at least one processor is configured to:
obtain a first parameter for a first signal received by the first antenna and a second parameter for a second signal received by the second antenna;
detect a phase difference between the first signal and the second signal;
obtain matching parameters, based on parameters corresponding to cases in which the phase difference satisfies a specified condition among the first parameter and the second parameter; and
obtain a third parameter for allowing a reflection coefficient of a signal flowing from the power distribution circuit to the coupler to exist within a specified range among the matching parameters.
2. The antenna structure of claim 1 , comprising a memory coupled to the at least one processor,
wherein the at least one processor stores the third parameter in the memory.
3. The antenna structure of claim 2 , comprising a first tuner disposed between the first antenna and the power distribution circuit,
wherein the at least one processor controls a phase of the first signal through the first tuner, based on the third parameter stored in the memory.
4. The antenna structure of claim 3 , comprising a second tuner disposed between the second antenna and the power distribution circuit,
wherein the at least one processor controls a phase of the second signal through the second tuner, based on the third parameter stored in the memory.
5. The antenna structure of claim 4 , wherein each of the first tuner and the second tuner comprises a variable capacitor and a switch.
6. The antenna structure of claim 1 , comprising:
a first switch disposed between the coupler and the power distribution circuit, and
a second switch disposed between the first switch and the power distribution circuit and the first antenna,
wherein the first switch is configured to selectively connect the coupler to the power distribution circuit or the second switch, and
wherein the second switch is configured to selectively connect the first antenna to the power distribution circuit or the first switch.
7. The antenna structure of claim 1 , wherein the first parameter includes at least one of a reflection coefficient, a return loss, or a voltage standing wave ratio (VSWR) of the first signal, and
wherein the second parameter includes at least one of a reflection coefficient, a return loss, or a voltage standing wave ratio (VSWR) of the second signal.
8. The antenna structure of claim 1 , wherein the specified condition is that the phase difference between the first signal and the second signal is 45 degrees or less.
9. A correction method for optimizing antenna performance, comprising:
obtaining a first parameter for a first signal and a second parameter for a second signal;
detecting a phase difference between the first signal and the second signal according to the obtained first parameter and the second parameter;
obtaining matching parameters, based on parameters corresponding to cases in which the phase difference satisfies a specified condition among the first parameter and the second parameter; and
obtaining a third parameter for allowing reflection coefficients of the first signal and the second signal to exist within a specified range among the matching parameters.
10. The correction method of claim 9 , wherein the obtaining the matching parameters further comprises obtaining a chart including the phase difference according to the first parameter and the second parameter.
11. The correction method of claim 10 , wherein the obtaining the matching parameters comprises obtaining at least a portion of the first parameter and the second parameter corresponding to cases in which the phase difference in the chart is 45 degrees or less.
12. The correction method of claim 9 , wherein the obtaining the first parameter and the second parameter comprises:
obtaining the first parameter in a state where the second parameter is fixed as an arbitrary parameter, and
obtaining the second parameter in a state where the first parameter is fixed as an arbitrary parameter.
13. The correction method of claim 9 , further comprising:
storing the third parameter in a memory; and
controlling a phase of the first signal and/or the second signal, based on the stored third parameter.
14. The correction method of claim 9 , comprising detecting the reflection coefficient, which is substantially equal for the first signal and the second signal.
15. The correction method of claim 9 , wherein the first parameter comprises at least one of a reflection coefficient, a return loss, or a voltage standing wave ratio (VSWR) of the first signal, and
wherein the second parameter comprises at least one of a reflection coefficient, a return loss, or a voltage standing wave ratio (VSWR) of the second signal.
16. An electronic device comprising:
a housing, wherein the housing comprises:
a first part;
a second part; and
a connecting part disposed between the first part and the second part, the first part being coupled to the connecting part so as to be rotatable with respect to the second part;
a first antenna including a first portion of the first part;
a second antenna including a second portion of the second part, a first point of the first antenna corresponding to a second point of the second antenna when the housing is folded;
at least one processor;
a power distribution circuit configured to equally supply power supplied from the at least one processor to the first antenna and the second antenna; and
a coupler disposed between the at least one processor and the power distribution circuit, and
wherein the at least one processor is configured to:
obtain a first parameter for a first signal received by the first antenna and a second parameter for a second signal received by the second antenna;
detect a phase difference between the first signal and the second signal;
obtain matching parameters, based on parameters corresponding to cases in which the phase difference satisfies a specified condition among the first parameter and the second parameter; and
obtain a third parameter for allowing a reflection coefficient of a signal flowing from the power distribution circuit to the coupler to exist within a specified range among the matching parameters.
17. The electronic device of claim 16 , comprising:
a first switch disposed between the coupler and the power distribution circuit; and
a second switch disposed between the first switch and the power distribution circuit and the first antenna,
wherein the first switch is configured to selectively connect the coupler to the power distribution circuit or the second switch, and
wherein the second switch is configured to selectively connect the first antenna to the power distribution circuit or the first switch.
18. The electronic device of claim 16 , comprising a memory coupled to the at least one processor,
wherein the at least one processor stores the third parameter in the memory.
19. The electronic device of claim 18 , comprising a first tuner disposed between the first antenna and the power distribution circuit,
wherein the at least one processor controls the first tuner, based on the third parameter stored in the memory.
20. The electronic device of claim 19 , comprising a second tuner disposed between the second antenna and the power distribution circuit,
wherein the at least one processor controls at least one of the first tuner or the second tuner, based on the third parameter stored in the memory.