Granted Patent B2

US 12,192,079 · App. 18/202,899 · Granted Jan 7, 2025

Inventors: Scott Muma (Coquitlam, CA); Winston Mok (Vancouver, CA); Steven Scott Gorshe (Beaverton, OR)

Assignee: Microchip Technology Inc.

H04L43/062H04L43/0894H04L7/04H04L2012/5674

Abstract

Claims (92)

1. A method comprising:

receiving at an intermediate-network-node a data stream generated by a previous network node, wherein the received data stream includes constant bit rate (CBR) carrier streams, at least one of which comprises frames, respective CBR carrier streams corresponding to CBR signals received at a source node;

sampling a counter accumulating a Physical Layer (PHY)-scaled stream clock (IPSCk) at a nominal sampling period (Tps) of a local reference clock of the intermediate-network-node to obtain a cumulative PHY-scaled count (CPSC) of the received respective data stream, the IPSCk generated by scaling a clock recovered from the received respective data stream to a predetermined nominal frequency (Fipsck_nom);

calculating a PHY-scaled stream phase offset (PSPO) that indicates the phase difference between a PHY-scaled stream nominal bit count (LPSD) and an incoming PHY-scaled count delta (IPSD), where the IPSD indicates an increment between successive CPSCs;

demultiplexing the received data stream to obtain the CBR carrier streams, respective ones of the CBR carrier streams including a previous network node cumulative phase offset report (CPOR-P) that indicates a previous network node cumulative phase offset (CPO-P), and a client rate report (CRR) that indicates a measured bit count of a respective CBR client at the source node;

calculating a cumulative phase offset (CPO) for respective ones of the CBR carrier streams that is a function of the CPO-P for the respective CBR carrier stream and the calculated PSPO;

replacing CPO-P in respective ones of the CBR carrier streams with the calculated CPO for the respective CBR carrier stream, or a function of the calculated CPO for the respective CBR carrier stream, to generate an updated CPOR in place of the CPOR-P in the respective CBR carrier stream;

multiplexing the CBR carrier streams into intermediate-network-node data streams; and

transmitting the intermediate-network-node data streams from the particular intermediate-network-node.

2. The method of claim 1 wherein the LPSD is a function of the Fipsck_nom and the Tps, and wherein the PSPO is in units of phase, and wherein the calculating the PSPO comprising:

calculating the IPSD; and

subtracting the LPSD from the IPSD.

3. The method of claim 1 wherein the CPO is calculated by adding the calculated PSPO to the CPO-P.

4. The method of claim 1 wherein the calculated CPO is a function of all CPO-Ps received by the intermediate-network-node since a last initialization of the intermediate-network-node.

5. The method of claim 1 wherein the calculating the CPO comprises:

calculating a delta cumulative phase offset (D-CPO) by subtracting a previously received CPO-P from the CPO-P;

calculating an accumulated D-CPO (ADCPO) by accumulating all of the D-CPO calculated by the intermediate-network-node since a last initialization of the intermediate-network-node;

calculating an accumulated PSPO (APSPO) by accumulating all of the PSPOs calculated by the intermediate-network-node since the last initialization of the intermediate-network-node; and

adding the APSPO to the ADCPO.

6. The method of claim 1 wherein the source node measures a bit rate for respective ones of the CBR clients in a CBR signal based on a local reference clock of the source node and encodes into respective ones of the CBR carrier streams the CRR that indicates the measured bit rate of the respective CBR client, and

wherein the intermediate-network-node does not change the content of respective ones of the CRRs.

7. The method of claim 1 further comprising:

receiving intermediate-network-node data stream from a last intermediate-network-node at a sink node, the received intermediate-network-node data stream including CBR carrier streams, at least one of which comprises frames;

sampling a counter accumulating a PHY-scaled stream clock at the sink node (IPSCk-S) at Tps based on a local reference clock of the sink node to obtain a cumulative PHY-scaled count at the sink node (CPSC-S), the IPSCk-S generated by scaling a clock recovered from the received intermediate-network-node data stream of the last intermediate-network node to Fipsck_nom;

calculating a PHY-scaled stream phase offset at the sink node (PSPO-S) by subtracting the LPSD from the incoming PHY-scaled count delta at the sink node (IPSD-S), where the IPSD-S represents an increment between successive CPSC-Ss;

demultiplexing the received intermediate-network-node data stream from the last intermediate-network-node to obtain the individual CBR carrier streams;

calculating a CPO at the sink node (CPO-S) for respective ones of the CBR carrier streams;

recovering CBR client signals using the calculated CPO-S and the CRR corresponding to the particular CBR signal; and

outputting from the sink node CBR signals that include the recovered CBR client signals.

8. The method of claim 7 wherein calculating the CPO-S comprises adding the calculated PSPO-S to a CPO-P received at the sink node for the respective CBR data stream.

9. The method of claim 7 wherein calculating CPO-S comprises:

calculating a delta cumulative phase offset (D-CPO) at the sink node by subtracting a previously received CPO-P received at the sink node from a CPO-P received at the sink node;

calculating a sink accumulated D-CPO (ADCPO-S) by accumulating all of the D-CPO calculated by the sink node since a last initialization of the sink node;

calculating a sink accumulated PSPO (APSPO-S) by accumulating all of the PSPO calculated by the sink node since a last initialization of the sink node; and

adding the APSPO-S to the ADCPO-S.

10. An integrated circuit (IC) device for an intermediate-network-node, comprising:

a Physical Layer (PHY) link input to receive a data stream generated by a previous network node that includes a plurality of constant bit rate (CBR) carrier streams, at least one of which comprises frames, respective ones of the CBR carrier streams including a previous network node cumulative phase offset report (CPOR-P) that indicates a previous network node cumulative phase offset (CPO-P) and a client rate report (CRR) that indicates a measured bit count of a respective CBR client at a source node;

a clock offset circuit coupled to the PHY link input to sample a counter accumulating a PHY-scaled stream clock (IPSCk) at a nominal sampling period (Tps) of a local reference clock of the intermediate-network-node to obtain a cumulative PHY-scaled count (CPSC) of the received respective data stream, the IPSCk generated by scaling a clock recovered from the received respective data stream to a predetermined nominal frequency (Fipsck_nom) and to calculate a PHY-scaled stream phase offset (PSPO) that indicates the phase difference between a PHY-scaled stream nominal bit count (LPSD) and an incoming PHY-scaled count delta (IPSD), where the IPSD indicates an increment between successive CPSCs;

a demultiplexer coupled to the PHY link input to demultiplex the received data stream to obtain the plurality of CBR carrier streams;

a cumulative phase offset report (CPOR) update logic coupled to the demultiplexer and the clock offset circuit to calculate a cumulative phase offset (CPO) for respective ones of the CBR carrier streams, wherein the calculated CPO is a function of the CPO-P and the calculated PSPO, and to replace the CPO-P with the calculated CPO for the respective CBR carrier stream, or with a function of the calculated CPO for the respective CBR carrier stream, and to generate an updated CPOR for the respective CBR carrier stream in place of the CPOR-P in the respective CBR carrier stream;

a multiplexer coupled to the demultiplexer and the CPOR update logic to multiplex the CBR carrier streams into a plurality of intermediate-network-node data streams;

encoders coupled to the multiplexer to encode the plurality of intermediate-network-node data streams; and

PHY link outputs coupled to the encoders to transmit the plurality of intermediate-network-node data streams from the IC device.

11. The IC device of claim 10 wherein the PHY link input, the clock offset circuit, the demultiplexer, the CPOR update logic, the encoders and the PHY link outputs are disposed in a single integrated circuit die.

12. The IC device of claim 10 wherein the CPOR update logic is to calculate the CPO by adding the calculated PSPO to the CPO-P.

13. The IC device of claim 10 wherein the CPOR update logic is to calculate the CPO by:

calculate a delta cumulative phase offset (D-CPO) by subtraction of a previously received CPO-P from the CPO-P;

calculate an accumulated D-CPO (ADCPO) by accumulating of all of the D-CPO calculated by the intermediate-network-node since a last initialization of the intermediate-network-node;

calculate an accumulated PSPO (APSPO) by accumulating of all of the PSPO calculated by the intermediate-network-node since a last initialization of the intermediate-network-node; and

add the ADCPO to the APSPO.

14. The IC device of claim 10 wherein the clock offset circuit includes:

a reference clock input to receive the local reference clock;

a sample pulse generator coupled to the reference clock input to generate a sample pulse at Tps;

a clock recovery circuit coupled to the PHY link input to recover a PHY link clock signal;

a clock scaler circuit coupled to the clock recovery circuit and the sample pulse generator, to scale the recovered PHY link clock signal to the Fipsck_nom to obtain the PHY-scaled stream clock;

a cumulative phase counter circuit coupled to the sample pulse generator and an output of the clock scaler circuit, the cumulative phase counter circuit to sample a counter accumulating the IPSCk at Tps to obtain the CPSC;

a first register coupled to the cumulative phase counter circuit to store the CPSC;

a second register coupled to the first register to store a previous CPSC;

a first subtraction logic coupled to the first and second registers to subtract the previous CPSC from the CPSC to obtain the IPSD;

a third register to store the LPSD; and

a second subtraction logic coupled to the first subtraction logic to subtract LPSD from IPSD to calculate the PSPO.

15. The IC device of claim 10 wherein the intermediate-network-node does not change the content of respective ones of the CRRs.

16. A network comprising:

a source node that includes:

an input to receive a plurality of constant bit rate (CBR) signals,

a cumulative phase offset report (CPOR) generating circuit to generate a CPOR that indicates an initial cumulative phase offset (CPO),

a CRR generating circuit to generate a client rate report (CRR) that indicates a measured bit rate of a respective CBR client, and

a CBR mapper coupled to the input to generate for respective ones of the CBR signals a corresponding CBR carrier stream and to insert the CRR and CBR client data into a respective CBR carrier stream, wherein at least one of the respective individual CBR carrier streams comprises frames,

a source output processing circuit to insert the CPOR into a respective CBR carrier stream and multiplex the CBR carrier streams to generate a plurality of source data streams;

a plurality of intermediate-network-nodes coupled to the source node, respective ones of the intermediate-network-nodes comprising an integrated circuit (IC) device that includes:

a Physical Layer (PHY) link input to receive a data stream generated by a previous network node that includes a plurality of CBR carrier streams, at least one of which comprises frames, respective ones of the CBR carrier streams including a previous network node cumulative phase offset report (CPOR-P) that indicates a previous network node cumulative phase offset (CPO-P) and the CRR;

a clock offset circuit coupled to the PHY link input to:

sample a counter accumulating a PHY-scaled stream clock (IPSCk) at a nominal sampling period (Tps) of a local reference clock of the intermediate-network-node to obtain a cumulative PHY-scaled count (CPSC) of the received respective data stream, the IPSCk generated by scaling a clock recovered from the received respective data stream to a predetermined nominal frequency (Fipsck_nom), and

calculate a PHY-scaled stream phase offset (PSPO) that indicates the phase difference between a PHY-scaled stream nominal bit count (LPSD) and an incoming PHY-scaled count delta (IPSD), where the IPSD indicates an increment between successive CPSCs;

a demultiplexer coupled to the PHY link input to demultiplex the received data stream to obtain the individual CBR carrier streams,

a cumulative phase offset report (CPOR) update logic coupled to the demultiplexer and the clock offset circuit to calculate a CPO for respective ones of the CBR carrier streams, wherein the calculated CPO is a function of the CPO-P for the particular CBR carrier stream and the calculated PSPO, and to replace the CPO-P for the particular CBR carrier stream with the calculated CPO for the respective CBR carrier stream to generate an updated CPOR for the respective CBR carrier stream in place of the CPOR-P for the particular CBR carrier stream,

a multiplexer coupled to the demultiplexer and the CPOR update logic to multiplex the CBR carrier streams into a plurality of intermediate-network-node data streams,

encoders coupled to the multiplexer to encode the plurality of intermediate-network-node data streams, and

PHY link outputs coupled to the encoders to transmit the plurality of intermediate-network-node data streams from the IC device; and

a sink node coupled to a last one of the intermediate-network-nodes for receiving an intermediate-network-node data stream from a last one of the intermediate-network-nodes, recovering CBR client signals; and outputting from the sink node a CBR signal that includes the recovered CBR client signals.

17. The network of claim 16 wherein the plurality of intermediate-network-nodes do not change the content of respective ones of the CRRs.

18. The network of claim 16 wherein the CPOR update logic calculates the CPO by adding the calculated PSPO to the CPO-P.

19. The network of claim 16 wherein the calculated CPO is a function of all of CPO-P received since a last initialization of the respective intermediate-network-node and all of the PSPO calculated since the last initialization of the respective intermediate-network-node.

20. The network of claim 16 wherein the sink node comprises:

a PHY link input of the sink node to receive the intermediate-network-node data stream from the last intermediate-network-node, the received intermediate-network-node data stream including the CBR carrier streams, at least one of which comprises frames;

a clock offset circuit of the sink node coupled to the PHY link input of the sink node to:

sample a counter accumulating a PHY-scaled stream clock at the sink node (IPSCk-S) at Tps of a local reference clock of the sink node to obtain a cumulative PHY-scaled count at the sink node (CPSC-S), the IPSCk-S generated by scaling a clock recovered from the received intermediate-network-node data stream of the last intermediate-network node to Fipsck_nom and

calculate a PSPO at the sink node (PSPO-S) that indicates the phase difference between a LPSD and an incoming PHY-scaled count delta at the sink node (IPSD-S), where the IPSD-S indicates an increment between successive CPSC-Ss;

a demultiplexer of the sink node coupled to the PHY link input of the sink node to demultiplex the intermediate-network-node data stream received from the last intermediate-network-node to obtain the individual CBR carrier streams at the sink node;

a CPOR update logic of the sink node coupled to the clock offset circuit to calculate a CPO at the sink node (CPO-S) for respective ones of the CBR carrier streams by adding the PSPO-S to a CPO-P received at the sink node for the respective CBR data stream;

a sink output processing circuit coupled to the demultiplexer of the sink node and the CPOR update logic of the sink node to recover the CBR client signals using the CPO-S and the CRR corresponding to the particular CBR signal; and

a PHY link output of the sink node coupled to the sink output processing circuit to output from the sink node CBR signals that include the recovered CBR client signals.

Assignments (1)

Continuity (3)

References Cited (177)