Granted Patent B2

US 12,197,282 · App. 18/553,929 · Granted Jan 14, 2025

Inventors: Qianhui Li (Beijing, CN); Qi Wang (Beijing, CN); Liu Yang (Beijing, CN); Yiyang Jiang (Beijing, CN); Xiaolei Yu (Beijing, CN); Jing He (Beijing, CN); Zongliang Huo (Beijing, CN); Tianchun Ye (Beijing, CN)

Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES

G06F11/1008G06F11/10G06F11/1016G06F11/102G06F11/1048G06F11/1402

Abstract

Claims (140)

1. A data recovery method for a flash memory, comprising:

reading data from the flash memory by using a preset read voltage;

calculating a check node error rate corresponding to the data;

calculating a read voltage adjustment step size according to the check node error rate;

adjusting the preset read voltage according to the read voltage adjustment step size and reading data from the flash memory by using the adjusted preset read voltage, and repeating the operation of calculating a check node error rate corresponding to the data to the operation of adjusting the preset read voltage according to the read voltage adjustment step size and reading data from the flash memory by using the adjusted preset read voltage, until the check node error rate is minimum; and

selecting a read voltage corresponding to the minimum check node error rate to read data from the flash memory, so as to perform a data recovery.

2. The data recovery method for a flash memory according to claim 1 , further comprising:

determining whether a current check node error rate is less than a preset threshold; and

in response to the current check node error rate being less than the preset threshold, stopping the operation of adjusting the preset read voltage according to the read voltage adjustment step size and reading data from the flash memory by using the adjusted preset read voltage, so as to perform a data recovery with current read data.

3. The data recovery method for a flash memory according to claim 1 , further comprising:

determining whether a current check node error rate is greater than a previous check node error rate, and

in response to the current check node error rate being greater than the previous check node error rate, stopping the operation of adjusting the preset read voltage according to the read voltage adjustment step size and reading data from the flash memory by using the adjusted preset read voltage, so as to perform a data recovery with previous read data.

4. The data recovery method for a flash memory according to claim 1 , wherein the calculating a check node error rate corresponding to the data comprises:

calculating the check node error rate according to a formula:

R

C

=

sum

(

H

·

D

k

)

/

m

where R C is the check node error rate, H is a parity check matrix, D k is data of a read codeword, and m is the number of check nodes.

5. The data recovery method for a flash memory according to claim 1 , wherein the calculating a read voltage adjustment step size according to the check node error rate comprises:

establishing a functional relationship between the check node error rate and a bit error rate and a functional relationship between the bit error rate and the read voltage adjustment step size, based on a threshold voltage distribution state of the flash memory;

establishing a functional relationship between the check node error rate and the read voltage adjustment step size according to the functional relationship between the check node error rate and the bit error rate and the functional relationship between the bit error rate and the read voltage adjustment step size; and

calculating the read voltage adjustment step size according to the functional relationship between the check node error rate and the read voltage adjustment step size.

6. The data recovery method for a flash memory according to claim 5 , wherein the establishing a functional relationship between the check node error rate and a bit error rate and a functional relationship between the bit error rate and the read voltage adjustment step size comprises:

calculating a bit error rate corresponding to the preset read voltage, wherein the calculating a bit error rate corresponding to the preset read voltage comprises: calculating the bit error rate according to a formula:

P

e

=

G

σ

i

-

1

(

R

V

i

-

μ

i

-

1

,

+

∞

)

+

G

σ

i

(

-

∞

,

R

V

i

-

μ

i

)

where P e is the bit error rate, i is a serial number of the threshold voltage distribution state, R V i is an i th preset read voltage, μ i is a mean value of an i th threshold voltage distribution state of the flash memory, μ i-1 is a mean value of an (i−1) th threshold voltage distribution state of the flash memory, G σ i-1 is a distribution function of Gaussian distribution corresponding to the threshold voltage distribution state with a mean value of 0 and a variance of σ i-1 , and G σ i is a distribution function of Gaussian distribution with a mean value of 0 and a variance of σ i .

7. The data recovery method for a Dash memory according to claim 5 , further comprising:

quantizing the functional relationship between the check node error rate and the read voltage adjustment step size into a lookup table, and obtaining the read voltage adjustment step size by looking up the lookup table.

8. The data recovery method for a flash memory according to claim 6 , wherein the i th preset read voltage and an i th optimal read voltage have a relationship:

R

V

i

-

R

O

i

=

D

R

i

where R O i is the i th optimal read voltage, and D R i is a read voltage adjustment step size between the i th preset read voltage and the i th optimal read voltage; and

the i th optimal read voltage is calculated by:

R

O

i

=

c

i

-

1

⁢

μ

i

-

1

+

c

i

⁢

μ

i

c

i

-

1

=

σ

i

σ

i

-

1

+

σ

i

,

c

i

=

σ

i

-

1

σ

i

-

1

+

σ

i

where μ i is the mean value of the i th threshold voltage distribution state, σ i is a variance of the i th threshold voltage distribution state, μ i-1 is the mean value of the (i−1) th threshold voltage distribution state, and σ i-1 is a variance of the (i−1) th threshold voltage distribution state.

9. The data recovery method for a flash memory according to claim 8 , further comprising:

establishing a functional relationship between a read voltage adjustment step size that between the i th preset read voltage and the i th optimal read voltage and a read voltage adjustment step size that between a j th preset read voltage and a j th optimal read voltage; and

calculating, based on the functional relationship, the read voltage adjustment step size between the j th preset read voltage and the j th optimal read voltage according to the read voltage adjustment step size between the i th preset read voltage and the i th optimal read voltage.

10. The data recovery method for a flash memory according to claim 1 , wherein the selecting a read voltage corresponding to the minimum check node error rate to read data from the flash memory so as to perform a data recovery comprises:

performing the data recovery on the read data by using an error correcting code.

Assignments (2)

Continuity (1)

References Cited (14)