IP Library › Granted Patent US 12,198,761
Granted Patent B2
US 12,198,761 · App. 18/060,420 · Granted Jan 14, 2025

Crossbar array with reduced disturbance

Inventor: Ning Ge (Danville, CA)
Assignee: TetraMem Inc.
G11C13/0069G11C13/003G11C13/0033G11C16/3427G11C2013/0071G11C2213/71G11C2213/79
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Quick Facts
Patent No.
US 12,198,761
App. No.
18/060,420
Granted
Jan 14, 2025
Kind
B2
Abstract

The present application provides methods for programming a circuit device with reduced disturbances. The methods may include: selecting a first target device on a target row of a plurality of rows and a target column of a plurality of columns; selecting the target row; connecting the plurality of rows other than the target row to a voltage potential with the same polarity as a programming signal; grounding the target column; preparing the programming signal on the target rows; sending a pulse signal enable an access transistor on the target column; and sending the programming signal to pass the first target device.

Claims (20)

1. A method of programming a circuit device with reduced disturbances comprising:

selecting a first target device from a plurality of devices in a crossbar array, wherein the first target device is connected to a target row of a plurality of rows and a target column of a plurality of columns in the crossbar array;

selecting the target row;

pre-charging one or more unselected rows of the plurality of rows to a voltage potential with the same polarity as a programming signal;

grounding the target column;

preparing the programming signal on the target row until the programming signal becomes stable on the target row;

sending a pulse signal to enable an access transistor on the target column; and

causing the prepared programming signal to pass through the first target device.

2. The method as claimed in claim 1 , wherein the voltage potential is substantially the same as the programming signal.

3. The method as claimed in claim 1 , further comprising: choosing a second target device of the plurality of devices after sending a pulse signal to pass the first target device.

4. The method as claimed in claim 1 , wherein each of the plurality of devices comprises a device with tunable resistance.

5. The method as claimed in claim 4 , wherein the device with tunable resistance comprises at least one of a memristor, a floating gate, a phase change device, a Resistive Random-Access Memory (RRAM or ReRam), a Magnetoresistive Random-Access Memory (MRAM), a Dynamic random-access memory (DRAM), or a Static Random-Access Memory (static RAM or SRAM).

6. The method as claimed in claim 1 , wherein one or more unselected columns of the plurality of columns are grounded.

7. The method as claimed in claim 1 , wherein the one or more unselected columns are floating.

8. The method as claimed in claim 1 , wherein the one or more unselected rows are floating.

9. The method as claimed in claim 1 , wherein the one or more unselected rows are connected to a voltage source having the same polarity as the programming signal.

10. The method as claimed in claim 1 , wherein the one or more unselected rows comprises a predefined number of rows of the plurality of rows.

11. The method as claimed in claim 1 , wherein the target row is selected by a decoder.

12. The method as claimed in claim 11 , wherein the programming signal is generated by a signal generator.

13. The method as claimed in claim 12 , wherein the pulse signal is generated by a pulse generator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2023
From: GE, NING
To: TETRAMEM INC.
Reel/Frame 062450/0947 →
Continuity (2)
Division 15999140 · Aug 17, 2018
Related Publication 20230102234A1 · Mar 30, 2023
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