IP Library › Granted Patent US 12,200,933
Granted Patent B2
US 12,200,933 · App. 17/570,172 · Granted Jan 14, 2025

3D and flash memory device

Inventors: Cheng-Yu Lee (Taoyuan, TW); Teng-Hao Yeh (Hsinchu County, TW)
Assignee: MACRONIX International Co., Ltd.
H10B43/27H10B41/27H10B43/10H10B43/20
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Quick Facts
Patent No.
US 12,200,933
App. No.
17/570,172
Granted
Jan 14, 2025
Kind
B2
Abstract

A three-dimensional AND flash memory device includes a gate stack structure and a silt. The silt extends along a first direction and divides the gate stack structure into a plurality of sub-blocks. Each sub-block includes a plurality of rows, and each row includes a plurality of channel pillars, a plurality of charge storage structures, and a plurality of pairs of conductive pillars. The plurality of pairs of conductive pillars are arranged in the plurality of channel pillars and penetrate the gate stack structure, and are respectively connected to the plurality of channel pillars. Each pair of conductive pillars includes a first conductive pillar and a second conductive pillar separated from each other along a second direction. There is an acute angle between the second direction and the first direction.

Claims (19)

1. A three-dimensional AND flash memory device comprising:

a gate stack structure disposed on a dielectric substrate and comprising a plurality of gate layers and a plurality of insulating layers alternately stacked with each other; and

a slit extending along a first direction and dividing the gate stack structure into a plurality of sub-blocks, wherein each of the sub-blocks comprises:

a plurality of rows, each of the rows comprising:

a plurality of channel pillars disposed on the dielectric substrate and penetrating the gate stack structure;

a plurality of charge storage structures disposed between the gate layers and sidewalls of the channel pillars; and

a plurality of pairs of conductive pillars disposed in the plurality of channel pillars, penetrating the gate stack structure, and respectively connected to the channel pillars, wherein each of the pairs of conductive pillars comprises a first conductive pillar and a second conductive pillar, and the first conductive pillar and the second conductive pillar are separated from each other along a second direction, wherein an included angle between the second direction and the first direction is an acute angle,

wherein outer sidewalls of the first conductive pillar and the second conductive pillar are in contact with an inner sidewall of a corresponding channel pillar, and top surfaces of the first conductive pillar and the second conductive pillar are higher than a top surface of the corresponding channel pillar.

2. The three-dimensional AND flash memory device according to claim 1 , further comprising:

a plurality of first conductive lines extending along a third direction and connecting the first conductive pillars, wherein the third direction is perpendicular to the first direction; and

a plurality of second conductive lines extending along the third direction and connecting the second conductive pillars.

3. The three-dimensional AND flash memory device according to claim 2 , wherein the first conductive lines and the second conductive lines are alternately disposed along the first direction.

4. The three-dimensional AND flash memory device according to claim 2 , wherein each of the channel pillars is crossed over by two first conductive lines and two second conductive lines.

5. The three-dimensional AND flash memory device according to claim 2 , wherein the first conductive pillars of a same row in a same sub-block are arranged along the first direction, and the second conductive pillars of a same row in a same sub-block are arranged along the first direction.

6. The three-dimensional AND flash memory device according to claim 2 , wherein in a same sub-block, the first conductive pillars are staggered with the second conductive pillars in adjacent rows in the third direction.

7. The three-dimensional AND flash memory device according to claim 2 , wherein

the first conductive pillars of an n th row of two adjacent sub-blocks are arranged along the third direction and are connected to a same first conductive line, and

the second conductive pillars of the n th row of the two adjacent sub-blocks are arranged along the third direction and are connected to a same second conductive line.

8. The three-dimensional AND flash memory device according to claim 1 , wherein the acute angle is 55 degrees.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2022
From: LEE, CHENG-YU; YEH, TENG-HAO
To: MACRONIX INTERNATIONAL CO., LTD.
Reel/Frame 058587/0432 →
Continuity (1)
Related Publication 20230217655A1 · Jul 6, 2023
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