Wireless microphone system and methods for synchronizing a wireless transmitter and a wireless receiver
The present disclosure describes a wireless microphone system that allows one or more microphones to wirelessly communicate with a receiver. Additionally, the wireless microphone system may allow for a plurality of microphones to be used interchangeably with the receiver. To ensure communication between the receiver and the one or more microphones, the receiver may occasionally transmit a synchronization signal to the one or more microphones. In response to receiving the synchronization signal, at least one of the one or more microphones may determine that a clock of the at least one microphone is drifting from the master audio clock of the receiver. The at least one microphone may then adjust the microphone's audio clock to re-synchronize the audio clock of the microphone with the master audio clock of the receiver.
1. A transmitter comprising:
an audio clock;
one or more processors; and
memory storing instructions that, when executed by the one or more processors, cause the transmitter to:
receive, from a receiver, a synchronization signal;
based on receiving the synchronization signal, determine a difference between a counter value indicating a first quantity of received audio samples and an expected counter value;
adjust the audio clock based on the difference between the counter value indicating the first quantity of received audio samples and the expected counter value;
transfer a number of audio samples from an audio sampling queue to a transmission queue; and
send, to the receiver, the number of audio samples at a predetermined interval.
2. The transmitter of claim 1 , wherein the transmitter comprises at least one of:
a wireless microphone; or
a lavalier microphone.
3. The transmitter of claim 1 , wherein the instructions, when executed by the one or more processors, cause the transmitter to store an address field of the synchronization signal.
4. The transmitter of claim 3 , wherein storing the address field of the synchronization signal comprises storing the address field in a hardware register.
5. The transmitter of claim 3 , wherein the instructions, when executed by the one or more processors, cause the transmitter to generate an interrupt in response to storing the address filed of the synchronization signal.
6. The transmitter of claim 1 , wherein adjusting the audio clock comprises at least one of:
increasing a rate at which a microphone obtains audio samples; or
decreasing a rate at which the microphone obtains audio samples.
7. The transmitter of claim 1 , wherein adjusting the audio clock comprises adjusting a frame boundary.
8. The transmitter of claim 1 , wherein the transmitter further comprises an analog-to-digital converter (ADC) configured to convert digital audio samples to analog audio samples prior to being sent to the receiver.
9. The transmitter of claim 1 , wherein the expected counter value is based on a second quantity of audio samples received between prior synchronization signals.
10. The transmitter of claim 1 , wherein the expected counter value is based on a quantity of audio samples configured by the receiver.
11. A system comprising:
a receiver configured to transmit a synchronization signal at predetermined intervals; and
a transmitter configured to:
receive, from the receiver, the synchronization signal;
in response to receiving the synchronization signal, determine a difference between a counter value indicating a first quantity of received audio samples and an expected counter value;
adjust an audio clock of the transmitter based on the counter value indicating the first quantity of received audio samples and the expected counter value;
transfer a number of audio samples from an audio sampling queue to a transmission queue; and
send, to the receiver, the number of audio samples at a predetermined interval.
12. The system of claim 11 , wherein the receiver comprises at least one of:
a wireless receiver;
a mobile device;
a smart phone;
a tablet; or
a laptop.
13. The system of claim 11 , wherein the transmitter comprises at least one of:
a wireless microphone; or
a lavalier microphone.
14. The system of claim 11 , wherein the transmitter is further configured to store an address field of the synchronization signal.
15. The system of claim 14 , wherein the address field is stored in a hardware register of the transmitter.
16. The system of claim 14 , wherein the transmitter is further configured to generate an interrupt in response to storing the address field of the synchronization signal.
17. The system of claim 11 , further comprising a second transmitter configured to:
receive, from the receiver, the synchronization signal;
in response to receiving the synchronization signal, determine a second difference between a second counter value indicating a second quantity of received audio samples and a second expected counter value; and
adjust a second audio clock of the second transmitter based on the difference between the second counter value indicating the second quantity of received audio samples and the second expected counter value.
18. The system of claim 11 , wherein adjusting the audio clock of the transmitter comprises at least one of:
increasing a rate at which the transmitter obtains audio samples; or
decreasing a rate at which the transmitter obtains audio samples.
19. The system of claim 11 , wherein adjusting the audio clock of the transmitter comprises adjusting a frame boundary.
20. The system of claim 11 , wherein the transmitter comprises a digital-to-analog converter (DAC) to convert digital audio samples to analog audio samples.
21. The system of claim 20 , wherein the receiver comprises an analog-to-digital converter (ADC) to convert the analog audio samples to second digital audio samples.
22. The system of claim 12 , wherein the expected counter value is based on at least one of:
a second quantity of audio samples received between prior synchronization signals; or
a quantity of audio samples configured by the receiver.
23. A method comprising:
receiving, by a transmitter from a receiver, a synchronization signal;
in response to receiving the synchronization signal, determining, by the transmitter, a difference between a counter value indicating a first quantity of received audio samples and an expected counter value;
adjusting, by the transmitter, an audio clock based on the difference between the counter value indicating a first quantity of received audio samples and the expected counter value;
transferring a number of audio samples from an audio sampling queue to a transmission queue; and
sending, to the receiver, the number of audio samples at a predetermined interval.
24. The method of claim 23 , wherein adjusting the audio clock comprises at least one of:
increasing a rate at which a microphone obtains audio samples;
decreasing a rate at which the microphone obtains audio samples; or
adjusting a frame boundary.
25. The method of claim 23 , wherein the expected counter value is based on at least one of:
a second quantity of audio samples received between prior synchronization signals; or
a quantity of audio samples configured by the receiver.