Parallel cross entropy benchmarking
Methods, systems and apparatus for benchmarking quantum computing hardware. In one aspect, a method includes defining an initial circuit configured to operate on an array of qubits, wherein the initial circuit comprises multiple instances of the two-qubit gate, wherein each instance of the two-qubit gate performs a same operation on a respective pair of neighboring qubits in the array; partitioning the initial circuit into multiple layers, wherein instances of the two-qubit gate in a respective layer can be implemented in parallel; for each of the multiple layers: constructing benchmarking circuits for the layer, wherein each benchmarking circuit for the layer comprises one or more cycles of quantum gates, each cycle comprising: the layer of instances of the two-qubit gate, and a plurality of single qubit gates; implementing the constructed benchmarking circuits to obtain experimental benchmarking data; and adjusting control parameters of the control model using the experimental benchmarking data.
1. A method comprising:
defining a control model for implementing a two-qubit quantum gate;
adjusting the control model for implementing the two-qubit quantum gate, the adjusting comprising:
defining an initial quantum circuit configured to operate on an array of qubits, wherein the initial quantum circuit comprises multiple instances of the two-qubit gate, wherein each instance of the two-qubit gate performs a same operation on a respective pair of neighboring qubits in the array of qubits;
partitioning the initial quantum circuit into multiple layers of instances of the two-qubit gate, wherein instances of the two-qubit gate in a respective layer can be implemented in parallel;
for each of the multiple layers of instances of the two-qubit gate: constructing one or more benchmarking circuits for the layer, wherein each benchmarking circuit for the layer comprises one or more cycles of quantum gates, each cycle comprising: the layer of instances of the two-qubit gate, and a plurality of single qubit gates, wherein each single qubit gate in the plurality of single qubit gates corresponds to a respective qubit in the array of qubits;
implementing the constructed benchmarking circuits to obtain experimental benchmarking data; and
adjusting control parameters of the control model for implementing the two-qubit quantum gate using the generated experimental benchmarking data.
2. The method of claim 1 , wherein constructing a benchmarking circuit for a layer of instances of the two-qubit gate comprises assigning one or more clock cycles of quantum gates to the array of qubits, comprising, for each clock cycle:
randomly sampling multiple single-qubit quantum gates from a predetermined set of single-qubit quantum gates, wherein each randomly sampled single-qubit quantum gate corresponds to a respective qubit in the array of qubits;
assigning the randomly sampled multiple single-qubit quantum gates to respective qubits in the array of qubits, and
assigning the instances of the two-qubit gate in the layer to respective pairs of nearest neighboring qubits in the array of qubits.
3. The method of claim 2 , wherein the predetermined set of single-qubit quantum gates comprises X ½ , Y ½ , and T quantum gates, wherein X ½ represents a π/2 rotation around the X axis, x axis, Y ½ represents a π/2 rotation represents a π/2 rotation around the y axis, and T represents a non-Clifford diagonal matrix {0, e i π/4 }.
4. The method of claim 2 , wherein assigning the randomly sampled multiple single-qubit quantum gates to respective qubits in the array of qubits comprises:
assigning a second single-qubit gate to qubit q for a current clock cycle, wherein the second single-qubit gate is different to a first single-qubit gate assigned to the qubit q for a preceding clock cycle.
5. The method of claim 1 , wherein constructing one or more benchmarking circuits for the layer comprises constructing multiple benchmarking circuits with different respective circuit depths.
6. The method of claim 1 , wherein implementing the constructed benchmarking circuits to obtain experimental benchmarking data comprises, for each constructed benchmarking circuit:
initializing each qubit in the array of qubits in an initial state;
applying the constructed benchmarking circuit to the initialized qubits in the array of qubits, wherein instances of the two-qubit gate in each layer of instances of the two-qubit gate are implemented in parallel;
measuring each qubit in the array of qubits to obtain measurement data for each qubit; and
extracting experimental benchmarking data from the measurement data.
7. The method of claim 5 , further comprising, prior to applying the constructed benchmarking circuit to the initialized qubits in the array of qubits, applying a Hadamard gate to each qubit in the initial state.
8. The method of claim 1 , wherein adjusting control parameters of the control model for implementing the two-qubit quantum gate using the generated experimental benchmarking data comprises:
classically simulating each constructed benchmarking circuit to obtain classical benchmarking data that represents output distribution of ideal implementations of the constructed benchmarking circuits;
comparing the classical benchmarking data to the experimental benchmarking data, comprising determining the cross entropy difference between the classical benchmarking data and the experimental benchmarking data, wherein the cross entropy difference represents the fidelity of the implementation of the constructed benchmarking circuits; and
adjusting control parameters of the control model for implementing the two-qubit quantum gate to improve the fidelity of the parallel implementation of the constructed benchmarking circuits.
9. The method of claim 8 , further comprising:
estimating the fidelity of the implementation of the constructed benchmarking circuits as a function of circuit depth; and
determining a measure of error-per-cycle by fitting the fidelity of the implementation of the constructed benchmarking circuits as a function of circuit depth to an exponential.
10. The method of claim 1 , wherein the control parameters of the control model comprise control angles of one or more quantum gates.
11. The method of claim 1 , wherein the array of qubits comprises a 2D array, and wherein the multiple layers of instances of the two-qubit gate comprise four layers of instances of the two-qubit gate.
12. An apparatus comprising:
one or more classical processors; and
quantum computing hardware in data communication with the one or more classical processors, wherein the quantum computing hardware comprises:
an array of qubits, and
control devices configured to operate the array of qubits;
wherein the apparatus is configured to perform operations comprising:
defining a control model for implementing a two-qubit quantum gate;
adjusting the control model for implementing the two-qubit quantum gate, the adjusting comprising:
defining an initial quantum circuit configured to operate on an array of qubits, wherein the initial quantum circuit comprises multiple instances of the two-qubit gate, wherein each instance of the two-qubit gate performs a same operation on a respective pair of neighboring qubits in the array of qubits;
partitioning the initial quantum circuit into multiple layers of instances of the two-qubit gate, wherein instances of the two-qubit gate in a respective layer can be implemented in parallel;
for each of the multiple layers of instances of the two-qubit gate: constructing one or more benchmarking circuits for the layer, wherein each benchmarking circuit for the layer comprises one or more cycles of quantum gates, each cycle comprising: the layer of instances of the two-qubit gate, and a plurality of single qubit gates, wherein each single qubit gate in the plurality of single qubit gates corresponds to a respective qubit in the array of qubits;
implementing the constructed benchmarking circuits to obtain experimental benchmarking data; and
adjusting control parameters of the control model for implementing the two-qubit quantum gate using the generated experimental benchmarking data.