IP Library › Granted Patent US 12,205,503
Granted Patent B2
US 12,205,503 · App. 18/480,899 · Granted Jan 21, 2025

Source driver and method of detecting crack of display panel

Inventors: Byeon Cheol Lee (Daejeon, KR); Seong Geon Kim (Daejeon, KR); Won Kim (Daejeon, KR); Tai Ming Piao (Daejeon, KR); Young Ho Shin (Daejeon, KR)
Assignee: LX SEMICON CO., LTD.
G09G3/006G09G2300/0426G09G2310/08G09G2330/12
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Quick Facts
Patent No.
US 12,205,503
App. No.
18/480,899
Granted
Jan 21, 2025
Kind
B2
Abstract

Disclosed are a source driver and a method of detecting crack of a display panel. A source driver may comprise a first circuit configured to apply first data to data lines connected to sub-pixels of a display panel to charge a first driving voltage; and a second circuit formed on the display panel that applies the first driving voltage to a detection line formed on the display panel to detect the presence of cracks in the display panel based on the illumination status of the sub-pixels, wherein the detection line includes a first detection node and a second detection node formed on one side of the display panel along its extension direction, wherein the first detection node is connected to data lines of the first and third sub-pixels, and wherein the second detection node is connected to data line of the second sub-pixel.

Claims (44)

1. A source driver comprising:

a first circuit configured to apply first data to data lines connected to a plurality of sub-pixels of a display panel to charge a first driving voltage; and

a second circuit configured to apply the first driving voltage to a detection line on the display panel to detect one or more cracks in the display panel based on the illumination status of the plurality of sub-pixels,

wherein the detection line includes a first detection node and a second detection node on one side of the display panel,

wherein the first detection node is connected to data lines connected to first and third sub-pixels,

wherein the second detection node is connected to a data line connected to a second sub-pixel, and

wherein the second circuit further comprises a third circuit configured to generate a reference resistance in relation to a resistance in the detection line.

2. The source driver of claim 1 , wherein the second circuit further comprises a driving voltage generator configured to apply the first driving voltage to the detection line through the first detection node.

3. The source driver of claim 2 ,

wherein the second circuit is configured to compare a predetermined reference voltage with a voltage of the second detection node to detect one or more cracks in the display panel.

4. The source driver of claim 1 , wherein the first driving voltage applied by the second circuit is supplied to the data lines connected to the plurality of sub-pixels through switches disposed between the first and second detection nodes included in the detection line and the data lines connected to the plurality of sub-pixels.

5. The source driver of claim 1 , wherein the reference resistance is configured to prevent each sub-pixel from emitting light based on a voltage drop caused by the resistance in the detection line.

6. The source driver of claim 1 , wherein the first data comprises black data.

7. The source driver of claim 1 , wherein, when the data lines connected to the plurality of sub-pixels are charged with the first driving voltage by applying the first data to the data lines connected to the plurality of sub-pixels, the first circuit is configured to operate in a Hi-Z state.

8. A display device of detecting one or more cracks of a display panel, the display device comprising:

the display panel; and

a driver IC configured to detect one or more cracks in the display panel,

wherein the driver IC includes:

a first circuit configured to apply first data to data lines connected to a plurality of sub-pixels of the display panel to charge a first driving voltage; and

a second circuit configured to apply the first driving voltage to a detection line on the display panel to detect one or more cracks in the display panel based on the illumination status of the plurality of sub-pixels,

wherein the detection line includes a first detection node and a second detection node on one side of the display panel along,

wherein the first detection node is connected to data lines connected to first and third sub-pixels,

wherein the second detection node is connected to a data line connected to a second sub-pixel, and

wherein the second circuit further comprises a third circuit configured to generate a reference resistance in relation to a resistance in the detection line.

9. The display device of claim 8 , wherein the second circuit further comprises a driving voltage generator configured to apply the first driving voltage to the detection line through the first detection nodes.

10. The display device of claim 9 , wherein the first driving voltage applied by the second circuit is supplied to the data lines connected to the plurality of sub-pixels through switches disposed between the first and second detection nodes included in the detection line and the data lines connected to the plurality of sub-pixels.

11. The display device of claim 9 ,

wherein the second circuit is configured to compare a predetermined reference voltage with a voltage of the second detection node to detect one or more cracks in the display panel.

12. The display device of claim 8 , wherein the first driving voltage applied by the second circuit is supplied to the data lines connected to the plurality of subpixels through switches disposed between the first and second detection nodes included in the detection line and the data lines connected to the plurality of sub-pixels.

13. The display device of claim 8 , wherein the first data comprises black data.

14. The display device of claim 8 , wherein, when the data lines connected to the plurality of sub-pixels are charged with the first driving voltage by applying the first data to the data lines connected to the plurality of sub-pixels, the first circuit is configured to operate in a Hi-Z state.

15. A method of detecting one or more panel cracks in a display device, the display device comprising a display panel, the method comprising:

applying first data to data lines connected with a plurality of sub-pixels of the display panel to charge a first driving voltage; and

applying the first driving voltage to a detection line formed in the display panel to detect one or more cracks in the display panel based on the illumination status of the plurality of sub-pixels,

wherein the detection line includes a first detection node and a second detection node formed on one side of the display panel,

wherein the first detection node is connected to data lines connected to first and third sub-pixels,

wherein the second detection node is connected to a data line connected to a second sub-pixel, and

wherein the method further comprises generating a reference resistance in relation to a resistance formed in the detection line.

16. The method of claim 15 , wherein the first driving voltage is applied to the detection line through the first detection node.

17. The method of claim 16 , further comprising:

comparing a preset reference voltage with a voltage of the second detection node to detect one or more cracks in the display panel.

18. The method of claim 15 , wherein the first driving voltage is supplied to the data lines connected to the plurality of sub-pixels via switches formed between the first and second detection nodes included in the detection line and the data lines connected to the plurality of sub-pixels.

19. The method of claim 15 , wherein the reference resistance is configured to prevent each sub-pixel from emitting light based on a voltage drop caused by the resistance formed in the detection line.

20. The method of claim 15 , wherein the first data includes black data, and wherein, when the data lines connected to the plurality of sub-pixels are charged with the first driving voltage by applying the first data to the data lines connected to the plurality of sub-pixels, the first circuit is configured to operate in a Hi-Z state.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2023
From: LEE, BYEON CHEOL; KIM, SEONG GEON; KIM, WON; PIAO, TAI MING; SHIN, YOUNG HO
To: LX SEMICON CO., LTD.
Reel/Frame 065124/0813 →
Priority Claims (2)
KR 10-2022-0127318 · Oct 5, 2022 · national
KR 10-2023-0129612 · Sep 26, 2023 · national
Continuity (1)
Related Publication 20240119874A1 · Apr 11, 2024
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Cited By (1)
US 12,664,920