IP Library › Granted Patent US 12,206,369
Granted Patent B2
US 12,206,369 · App. 18/165,713 · Granted Jan 21, 2025

High flux detection and imaging using capacitor transimpedance amplifier (CTIA)-based unit cells in imaging devices

Inventor: Bryan W. Kean (Denver, CO)
Assignee: Raytheon Company
H03F3/087H03F1/083H03F3/005H03F2203/45551
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Quick Facts
Patent No.
US 12,206,369
App. No.
18/165,713
Granted
Jan 21, 2025
Kind
B2
Abstract

An apparatus includes a photodetector configured to generate an electrical current based on received illumination. The apparatus also includes a capacitor transimpedance amplifier (CTIA) unit cell configured to generate an integration voltage based on the electrical current. The CTIA unit cell includes (i) an amplifier configured to receive the electrical current and a first reference voltage, (ii) a feedback capacitor coupled in parallel across the amplifier, and (iii) a reset switch coupled in parallel across the feedback capacitor. The apparatus further includes a comparator configured to compare an input voltage of the amplifier and a second reference voltage, where generation of the integration voltage is modifiable based on the comparison.

Claims (75)

1. An apparatus comprising:

a photodetector configured to generate an electrical current based on received illumination;

a capacitor transimpedance amplifier (CTIA) unit cell configured to generate an integration voltage based on the electrical current, the CTIA unit cell comprising (i) an amplifier configured to receive the electrical current and a first reference voltage, (ii) a feedback capacitor coupled in parallel across the amplifier, and (iii) a reset switch coupled in parallel across the feedback capacitor;

a comparator configured to compare an input voltage of the amplifier and a second reference voltage, wherein generation of the integration voltage is modifiable based on the comparison;

a bypass switch coupled in parallel with a coupling capacitor of the CTIA unit cell; and

a clamp switch configured to clamp the integration voltage to a specified voltage.

2. The apparatus of claim 1 , wherein:

the reset and clamp switches are configured to be closed to reset the CTIA unit cell; and

the reset switch is configured to be opened at a beginning of an integration period.

3. The apparatus of claim 2 , wherein:

when no high flux condition is detected by the comparator based on the comparison, the clamp switch is configured to be opened after the beginning of the integration period, and the bypass switch is configured to remain opened during the integration period; and

when a high flux condition is detected by the comparator based on the comparison, the clamp switch is configured to be opened so that the integration voltage is not clamped to the specified voltage, and the bypass switch is configured to be closed in order to provide a pre-integration voltage generated by the amplifier as the integration voltage.

4. The apparatus of claim 1 , wherein the comparator is configured to detect a high flux condition based on the comparison prior to integration of the electrical current, during integration of the electrical current, or after integration of the electrical current.

5. The apparatus of claim 1 , wherein:

the comparator is configured to generate a detection signal in response to detecting a high flux condition based on the comparison; and

the apparatus further comprises a controller configured to control operation of the apparatus based on the detection signal in order to modify the generation of the integration voltage.

6. The apparatus of claim 1 , further comprising:

a buffer configured to receive the integration voltage and generate an output signal.

7. An apparatus comprising:

a photodetector configured to generate an electrical current based on received illumination;

a capacitor transimpedance amplifier (CTIA) unit cell configured to generate an integration voltage based on the electrical current, the CTIA unit cell comprising (i) an amplifier configured to receive the electrical current and a first reference voltage, (ii) a feedback capacitor coupled in parallel across the amplifier, and (iii) a reset switch coupled in parallel across the feedback capacitor;

a comparator configured to compare an input voltage of the amplifier and a second reference voltage, wherein generation of the integration voltage is modifiable based on the comparison; and

an additional switch and an additional capacitor coupled in series with each other and coupled in parallel with the feedback capacitor;

wherein, when a high flux condition is detected by the comparator based on the comparison, the additional switch is configured to be closed in order to increase a capacitance in a feedback path of the amplifier.

8. An apparatus comprising:

a photodetector configured to generate an electrical current based on received illumination;

a capacitor transimpedance amplifier (CTIA) unit cell configured to generate an integration voltage based on the electrical current, the CTIA unit cell comprising (i) an amplifier configured to receive the electrical current and a first reference voltage, (ii) a feedback capacitor coupled in parallel across the amplifier, and (iii) a reset switch coupled in parallel across the feedback capacitor; and

a comparator configured to compare an input voltage of the amplifier and a second reference voltage, wherein generation of the integration voltage is modifiable based on the comparison;

wherein the amplifier comprises (i) multiple transistors and a first current source coupled in series and (ii) an additional switch and a second current source coupled in series, the additional switch and the second current source coupled in parallel with the first current source; and

wherein, when a high flux condition is detected by the comparator based on the comparison, the additional switch is configured to be closed in order to increase a slew rate of the amplifier.

9. A system comprising:

a focal plane array comprising multiple pixel circuit elements;

wherein each pixel circuit element comprises:

a photodetector configured to generate an electrical current based on received illumination;

a capacitor transimpedance amplifier (CTIA) unit cell configured to generate an integration voltage based on the electrical current, the CTIA unit cell comprising (i) an amplifier configured to receive the electrical current and a first reference voltage, (ii) a feedback capacitor coupled in parallel across the amplifier, and (iii) a reset switch coupled in parallel across the feedback capacitor;

a comparator configured to compare an input voltage of the amplifier and a second reference voltage, wherein generation of the integration voltage is modifiable based on the comparison;

a bypass switch coupled in parallel with a coupling capacitor of the CTIA unit cell; and

a clamp switch configured to clamp the integration voltage to a specified voltage.

10. The system of claim 9 , wherein, in each pixel circuit element:

the reset and clamp switches are configured to be closed to reset the CTIA unit cell; and

the reset switch is configured to be opened at a beginning of an integration period.

11. The system of claim 10 , wherein, in each pixel circuit element:

when no high flux condition is detected by the comparator based on the comparison, the clamp switch is configured to be opened after the beginning of the integration period, and the bypass switch is configured to remain opened during the integration period; and

when a high flux condition is detected by the comparator based on the comparison, the bypass switch is configured to be closed in order to provide a pre-integration voltage generated by the amplifier as the integration voltage, and the clamp switch is configured to be opened so that the integration voltage is not clamped to the specified voltage.

12. The system of claim 9 , wherein:

each pixel circuit element further comprises an additional switch and an additional capacitor coupled in series with each other and coupled in parallel with the feedback capacitor; and

when a high flux condition is detected by the comparator based on the comparison, the additional switch is configured to be closed in order to increase a capacitance in a feedback path of the amplifier.

13. The system of claim 9 , wherein, in each pixel circuit element:

the amplifier comprises (i) multiple transistors and a first current source coupled in series and (ii) an additional switch and a second current source coupled in series, the additional switch and the second current source coupled in parallel with the first current source; and

when a high flux condition is detected by the comparator based on the comparison, the additional switch is configured to be closed in order to increase a slew rate of the amplifier.

14. The system of claim 9 , wherein, in each pixel circuit element, the comparator is configured to detect a high flux condition based on the comparison prior to integration of the electrical current, during integration of the electrical current, or after integration of the electrical current.

15. The system of claim 9 , wherein:

in each pixel circuit element, the comparator is configured to generate a detection signal in response to detecting a high flux condition based on the comparison; and

the system further comprises at least one controller configured to control operation of the pixel circuit elements based on the detection signals.

16. The system of claim 9 , wherein each pixel circuit element further comprises:

a buffer configured to receive the integration voltage and generate an output signal.

17. A method comprising:

generating an electrical current based on received illumination using a photodetector;

integrating the electrical current using a capacitor transimpedance amplifier (CTIA) unit cell to generate an integration voltage based on the electrical current, the CTIA unit cell comprising (i) an amplifier configured to receive the electrical current and a first reference voltage, (ii) a feedback capacitor coupled in parallel across the amplifier, and (iii) a reset switch coupled in parallel across the feedback capacitor;

comparing an input voltage of the amplifier and a second reference voltage; and

controlling generation of the integration voltage based on the comparison;

wherein:

a bypass switch is coupled in parallel with a coupling capacitor of the CTIA unit cell; and

a clamp switch is configured to clamp the integration voltage to a specified voltage.

18. The method of claim 17 , wherein controlling the generation of the integration voltage comprises:

closing the reset and clamp switches to reset the CTIA unit cell;

opening the reset switch at a beginning of an integration period;

when no high flux condition is detected based on the comparison, opening the clamp switch after the beginning of the integration period and keeping the bypass switch opened during the integration period; and

when a high flux condition is detected based on the comparison, opening the clamp switch so that the integration voltage is not clamped to the specified voltage and closing the bypass switch in order to provide a pre-integration voltage generated by the amplifier as the integration voltage.

19. The method of claim 17 , wherein:

an additional switch and an additional capacitor are coupled in series with each other and coupled in parallel with the feedback capacitor; and

controlling the generation of the integration voltage comprises, when a high flux condition is detected based on the comparison, closing the additional switch in order to increase a capacitance in a feedback path of the amplifier.

20. The method of claim 17 , wherein:

the amplifier comprises (i) multiple transistors and a first current source coupled in series and (ii) an additional switch and a second current source coupled in series, the additional switch and the second current source coupled in parallel with the first current source; and

controlling the generation of the integration voltage comprises, when a high flux condition is detected based on the comparison, closing the additional switch in order to increase a slew rate of the amplifier.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2023
From: KEAN, BRYAN W.
To: RAYTHEON COMPANY
Reel/Frame 062617/0759 →
Continuity (1)
Related Publication 20240267006A1 · Aug 8, 2024
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